7 * Translate physical system address to dimm identification.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/Feat)
12 * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $
16 *****************************************************************************
18 * Copyright (c) 2011, Advanced Micro Devices, Inc.
19 * All rights reserved.
21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
30 * from this software without specific prior written permission.
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 * ***************************************************************************
48 *----------------------------------------------------------------------------
51 *----------------------------------------------------------------------------
61 #include "OptionMemory.h"
62 #include "heapManager.h"
63 #include "mfidendimm.h"
64 #include "GeneralServices.h"
69 #define FILECODE PROC_MEM_FEAT_IDENDIMM_MFIDENDIMM_FILECODE
70 extern MEM_NB_SUPPORT memNBInstalled[];
72 /*----------------------------------------------------------------------------
73 * DEFINITIONS AND MACROS
75 *----------------------------------------------------------------------------
77 #define MAX_DCTS_PER_DIE 2 ///< Max DCTs per die
78 #define MAX_CHLS_PER_DCT 1 ///< Max Channels per DCT
80 /*----------------------------------------------------------------------------
81 * TYPEDEFS AND STRUCTURES
83 *----------------------------------------------------------------------------
86 /*----------------------------------------------------------------------------
87 * PROTOTYPES OF LOCAL FUNCTIONS
89 *----------------------------------------------------------------------------
93 MemFTransSysAddrToCS (
94 IN OUT AMD_IDENTIFY_DIMM *AmdDimmIdentify,
95 IN MEM_MAIN_DATA_BLOCK *mmPtr
101 IN MEM_NB_BLOCK *NBPtr,
104 IN BIT_FIELD_NAME BitFieldName
113 /*----------------------------------------------------------------------------
116 *----------------------------------------------------------------------------
118 /*-----------------------------------------------------------------------------*/
121 * This function identifies the dimm on which the given memory address locates.
123 * @param[in, out] *AmdDimmIdentify - Pointer to the parameter structure AMD_IDENTIFY_DIMM
125 * @retval AGESA_SUCCESS - Successfully translate physical system address
126 * to dimm identification.
127 * AGESA_BOUNDS_CHK - Targeted address is out of bound.
133 IN OUT AMD_IDENTIFY_DIMM *AmdDimmIdentify
138 MEM_MAIN_DATA_BLOCK mmData; // Main Data block
140 MEM_DATA_STRUCT MemData;
141 LOCATE_HEAP_PTR LocHeap;
142 ALLOCATE_HEAP_PARAMS AllocHeapParams;
148 LibAmdMemCopy (&(MemData.StdHeader), &(AmdDimmIdentify->StdHeader), sizeof (AMD_CONFIG_PARAMS), &(AmdDimmIdentify->StdHeader));
149 mmData.MemPtr = &MemData;
150 RetVal = MemSocketScan (&mmData);
151 if (RetVal == AGESA_FATAL) {
154 DieCount = mmData.DieCount;
156 // Search for AMD_MEM_AUTO_HANDLE on the heap first.
157 // Only apply for space on the heap if cannot find AMD_MEM_AUTO_HANDLE on the heap.
158 LocHeap.BufferHandle = AMD_MEM_AUTO_HANDLE;
159 if (HeapLocateBuffer (&LocHeap, &AmdDimmIdentify->StdHeader) == AGESA_SUCCESS) {
160 // NB block has already been constructed by main block.
161 // No need to construct it here.
162 NBPtr = (MEM_NB_BLOCK *)LocHeap.BufferPtr;
164 AllocHeapParams.RequestedBufferSize = (DieCount * (sizeof (MEM_NB_BLOCK)));
165 AllocHeapParams.BufferHandle = AMD_MEM_AUTO_HANDLE;
166 AllocHeapParams.Persist = HEAP_SYSTEM_MEM;
167 if (HeapAllocateBuffer (&AllocHeapParams, &AmdDimmIdentify->StdHeader) != AGESA_SUCCESS) {
168 PutEventLog (AGESA_FATAL, MEM_ERROR_HEAP_ALLOCATE_FOR_IDENTIFY_DIMM_MEM_NB_BLOCK, 0, 0, 0, 0, &AmdDimmIdentify->StdHeader);
169 ASSERT(FALSE); // Could not allocate heap space for NB block for Identify DIMM
172 NBPtr = (MEM_NB_BLOCK *)AllocHeapParams.BufferPtr;
173 mmData.NBPtr = NBPtr;
174 // Construct each die.
175 for (Die = 0; Die < DieCount; Die ++) {
177 while (memNBInstalled[i].MemIdentifyDimmConstruct != 0) {
178 if (memNBInstalled[i].MemIdentifyDimmConstruct (&NBPtr[Die], &MemData, Die)) {
183 if (memNBInstalled[i].MemIdentifyDimmConstruct == 0) {
184 PutEventLog (AGESA_FATAL, MEM_ERROR_NO_CONSTRUCTOR_FOR_IDENTIFY_DIMM, Die, 0, 0, 0, &AmdDimmIdentify->StdHeader);
185 ASSERT(FALSE); // No Identify DIMM constructor found
191 if ((RetVal = MemFTransSysAddrToCS (AmdDimmIdentify, &mmData)) == AGESA_SUCCESS) {
192 // Translate Node, DCT and Chip select number to Socket, Channel and Dimm number.
193 Node = AmdDimmIdentify->SocketId;
194 Dct = AmdDimmIdentify->MemChannelId;
195 AmdDimmIdentify->SocketId = MemData.DiesPerSystem[Node].SocketId;
196 AmdDimmIdentify->MemChannelId = NBPtr[Node].GetSocketRelativeChannel (&NBPtr[Node], Dct, 0);
197 AmdDimmIdentify->DimmId /= 2;
204 /*----------------------------------------------------------------------------
207 *----------------------------------------------------------------------------
210 /*-----------------------------------------------------------------------------*/
213 * This function translates the given physical system address to
214 * a node, channel select, chip select, bank, row, and column address.
216 * @param[in, out] *AmdDimmIdentify - Pointer to the parameter structure AMD_IDENTIFY_DIMM
217 * @param[in, out] *mmPtr - Pointer to the MEM_MAIN_DATA_BLOCK
219 * @retval AGESA_SUCCESS - The chip select address is found
220 * @retval AGESA_BOUNDS_CHK - Targeted address is out of bound.
225 MemFTransSysAddrToCS (
226 IN OUT AMD_IDENTIFY_DIMM *AmdDimmIdentify,
227 IN MEM_MAIN_DATA_BLOCK *mmPtr
231 BOOLEAN DctSelHiRngEn;
232 BOOLEAN DctSelIntLvEn;
234 BOOLEAN HiRangeSelected;
235 BOOLEAN DramHoleValid;
238 BOOLEAN IntLvRgnSwapEn;
245 UINT8 DctSelIntLvAddr;
250 UINT8 IntLvRgnBaseAddr;
251 UINT8 IntLvRgnLmtAddr;
254 UINT32 DramHoleOffset;
257 UINT64 DctSelBaseAddr;
258 UINT64 DctSelBaseOffset;
263 UINT64 ChannelOffset;
268 UINT8 *ChannelSelect;
271 SysAddr = AmdDimmIdentify->MemoryAddress;
272 NodeID = &(AmdDimmIdentify->SocketId);
273 ChannelSelect = &(AmdDimmIdentify->MemChannelId);
274 ChipSelect = &(AmdDimmIdentify->DimmId);
277 NBPtr = mmPtr->NBPtr;
279 // Loop to determine the dram range
280 for (range = 0; range < mmPtr->DieCount; range ++) {
282 temp = MemFGetPCI (NBPtr, 0, 0, BFDramBaseReg0 + range);
283 DramEn = (UINT8) (temp & 0x3);
284 IntlvEn = (UINT8) ((temp >> 8) & 0x7);
286 DramBase = ((UINT64) (MemFGetPCI (NBPtr, 0, 0, BFDramBaseHiReg0 + range) & 0xFF) << 40) |
287 (((UINT64) temp & 0xFFFF0000) << 8);
290 temp = MemFGetPCI (NBPtr, 0, 0, BFDramLimitReg0 + range);
291 *NodeID = (UINT8) (temp & 0x7);
292 IntlvSel = (UINT8) ((temp >> 8) & 0x7);
293 DramLimit = ((UINT64) (MemFGetPCI (NBPtr, 0, 0, BFDramLimitHiReg0 + range) & 0xFF) << 40) |
294 (((UINT64) temp << 8) | 0xFFFFFF);
297 if ((DramEn != 0) && (DramBase <= SysAddr) && (SysAddr <= DramLimit) &&
298 ((IntlvEn == 0) || (IntlvSel == ((SysAddr >> 12) & IntlvEn)))) {
299 // Determine the number of bit positions consumed by Node Interleaving
322 // F2x10C Swapped Interleaved Region
323 IntLvRgnSwapEn = (BOOLEAN) MemFGetPCI (NBPtr, *NodeID, 0, BFIntLvRgnSwapEn);
324 if (IntLvRgnSwapEn) {
325 IntLvRgnBaseAddr = (UINT8) MemFGetPCI (NBPtr, *NodeID, 0, BFIntLvRgnBaseAddr);
326 IntLvRgnLmtAddr = (UINT8) MemFGetPCI (NBPtr, *NodeID, 0, BFIntLvRgnLmtAddr);
327 IntLvRgnSize = (UINT8) MemFGetPCI (NBPtr, *NodeID, 0, BFIntLvRgnSize);
328 ASSERT (IntLvRgnSize == (IntLvRgnLmtAddr - IntLvRgnBaseAddr + 1));
329 if (((SysAddr >> 34) == 0) &&
330 ((((SysAddr >> 27) >= IntLvRgnBaseAddr) && ((SysAddr >> 27) <= IntLvRgnLmtAddr))
331 || ((SysAddr >> 27) < IntLvRgnSize))) {
332 SysAddr ^= (UINT64) IntLvRgnBaseAddr << 27;
336 // Extract variables from F2x110 DRAM Controller Select Low Register
337 DctSelHiRngEn = (BOOLEAN) MemFGetPCI (NBPtr, *NodeID, 0, BFDctSelHiRngEn);
338 DctSelHi = (UINT8) MemFGetPCI (NBPtr, *NodeID, 0, BFDctSelHi);
339 DctSelIntLvEn = (BOOLEAN) MemFGetPCI (NBPtr, *NodeID, 0, BFDctSelIntLvEn);
340 DctGangEn = (BOOLEAN) MemFGetPCI (NBPtr, *NodeID, 0, BFDctGangEn);
341 DctSelIntLvAddr = (UINT8) MemFGetPCI (NBPtr, *NodeID, 0, BFDctSelIntLvAddr);
342 DctSelBaseAddr = (UINT64) MemFGetPCI (NBPtr, *NodeID, 0, BFDctSelBaseAddr) << 27;
343 DctSelBaseOffset = (UINT64) MemFGetPCI (NBPtr, *NodeID, 0, BFDctSelBaseOffset) << 26;
346 // Determine if high DCT address range is being selected
347 if (DctSelHiRngEn && !DctGangEn && (SysAddr >= DctSelBaseAddr)) {
348 HiRangeSelected = TRUE;
350 HiRangeSelected = FALSE;
355 *ChannelSelect = (UINT8) ((SysAddr >> 3) & 0x1);
356 } else if (HiRangeSelected) {
357 *ChannelSelect = DctSelHi;
358 } else if (DctSelIntLvEn && (DctSelIntLvAddr == 0)) {
359 *ChannelSelect = (UINT8) ((SysAddr >> 6) & 0x1);
360 } else if (DctSelIntLvEn && (((DctSelIntLvAddr >> 1) & 0x1) != 0)) {
361 temp = MemFUnaryXOR ((UINT32) ((SysAddr >> 16) & 0x1F));
362 if ((DctSelIntLvAddr & 0x1) != 0) {
363 *ChannelSelect = (UINT8) (((SysAddr >> 9) & 0x1) ^ temp);
365 *ChannelSelect = (UINT8) (((SysAddr >> 6) & 0x1) ^ temp);
367 } else if (DctSelIntLvEn) {
368 *ChannelSelect = (UINT8) ((SysAddr >> (12 + ILog)) & 0x1);
369 } else if (DctSelHiRngEn) {
370 *ChannelSelect = ~DctSelHi & 0x1;
374 ASSERT (*ChannelSelect < NBPtr[*NodeID].DctCount);
376 DramHoleOffset = MemFGetPCI (NBPtr, *NodeID, 0, BFDramHoleOffset) << 23;
377 DramHoleValid = (BOOLEAN) MemFGetPCI (NBPtr, *NodeID, 0, BFDramHoleValid);
379 // Determine base address offset
380 if (HiRangeSelected) {
381 if (((DctSelBaseAddr >> 32) == 0) && DramHoleValid && (SysAddr >= (UINT64) 0x100000000)) {
382 ChannelOffset = (UINT64) DramHoleOffset;
384 ChannelOffset = DctSelBaseOffset;
387 if (DramHoleValid && (SysAddr >= (UINT64) 0x100000000)) {
388 ChannelOffset = (UINT64) DramHoleOffset;
390 ChannelOffset = DramBase;
394 // Remove hoisting offset and normalize to DRAM bus addresses
395 ChannelAddr = SysAddr - ChannelOffset;
397 // Remove node interleaving
399 ChannelAddr = ((ChannelAddr >> (12 + ILog)) << 12) | (ChannelAddr & 0xFFF);
402 // Remove channel interleave
403 if (DctSelIntLvEn && !HiRangeSelected && !DctGangEn) {
404 if ((DctSelIntLvAddr & 1) != 1) {
405 // A[6] Select or Hash 6
406 ChannelAddr = ((ChannelAddr >> 7) << 6) | (ChannelAddr & 0x3F);
407 } else if (DctSelIntLvAddr == 1) {
409 ChannelAddr = ((ChannelAddr >> 13) << 12) | (ChannelAddr & 0xFFF);
412 ChannelAddr = ((ChannelAddr >> 10) << 9) | (ChannelAddr & 0x1FF);
416 // Determine the Chip Select
417 for (cs = 0; cs < MAX_CS_PER_CHANNEL; ++ cs) {
418 DctNum = DctGangEn ? 0 : *ChannelSelect;
420 // Obtain the CS Base
421 temp = MemFGetPCI (NBPtr, *NodeID, DctNum, BFCSBaseAddr0Reg + cs);
422 CSEn = (BOOLEAN) (temp & 0x1);
423 CSBase = ((UINT64) temp & CS_REG_MASK) << 8;
425 // Obtain the CS Mask
426 CSMask = ((UINT64) MemFGetPCI (NBPtr, *NodeID, DctNum, BFCSMask0Reg + (cs >> 1)) & CS_REG_MASK) << 8;
428 // Adjust the Channel Addr for easy comparison
429 InputAddr = ((ChannelAddr >> 8) & CS_REG_MASK) << 8;
431 if (CSEn && ((InputAddr & ~CSMask) == (CSBase & ~CSMask))) {
436 temp = MemFGetPCI (NBPtr, *NodeID, 0, BFOnLineSpareControl);
437 SwapDone = (BOOLEAN) ((temp >> (1 + 2 * (*ChannelSelect))) & 0x1);
438 BadDramCs = (UINT8) ((temp >> (4 + 4 * (*ChannelSelect))) & 0x7);
439 if (SwapDone && (cs == BadDramCs)) {
440 // Find the spare rank for the channel
441 for (spare = 0; spare < MAX_CS_PER_CHANNEL; ++spare) {
442 if ((MemFGetPCI (NBPtr, *NodeID, DctNum, BFCSBaseAddr0Reg + spare) & 0x2) != 0) {
448 ASSERT (*ChipSelect < MAX_CS_PER_CHANNEL);
459 // last ditch sanity check
460 ASSERT (!CSFound || ((*NodeID < mmPtr->DieCount) && (*ChannelSelect < NBPtr[*NodeID].DctCount) && (*ChipSelect < MAX_CS_PER_CHANNEL)));
462 return AGESA_SUCCESS;
464 return AGESA_BOUNDS_CHK;
470 /*-----------------------------------------------------------------------------*/
473 * This function is the interface to call the PCI register access function
474 * defined in NB block.
476 * @param[in] *NBPtr - Pointer to the parameter structure MEM_NB_BLOCK
477 * @param[in] NodeID - Node ID number of the target Northbridge
478 * @param[in] DctNum - DCT number if applicable, otherwise, put 0
479 * @param[in] BitFieldName - targeted bitfield
481 * @retval UINT32 - 32 bits PCI register value
487 IN MEM_NB_BLOCK *NBPtr,
490 IN BIT_FIELD_NAME BitFieldName
493 MEM_NB_BLOCK *LocalNBPtr;
494 // Get the northbridge pointer for the targeted node.
495 LocalNBPtr = &NBPtr[NodeID];
496 LocalNBPtr->Dct = DctNum;
497 // The caller of this function will take care of the ganged/unganged situation.
498 // So Ganged is set to be false here, and do PCI read on the DCT specified by DctNum.
499 return LocalNBPtr->GetBitField (LocalNBPtr, BitFieldName);
502 /*-----------------------------------------------------------------------------*/
505 * This function returns an even parity bit (making the total # of 1's even)
506 * {0, 1} = number of set bits in argument is {even, odd}.
508 * @param[in] address - the address on which the parity bit will be calculated
510 * @retval UINT8 - parity bit
523 for (index = 0; index < 32; ++ index) {
524 parity = (UINT8) (parity ^ (address & 0x1));
525 address = address >> 1;