a4468e1b16a0aea9065712ad8541de549ddf531d
[coreboot.git] / src / vendorcode / amd / agesa / Include / OptionFamily14hInstall.h
1 /* $NoKeywords:$ */
2 /**
3  * @file
4  *
5  * Install of family 14h support
6  *
7  * This file generates the default tables for family 14h processors.
8  *
9  * @xrefitem bom "File Content Label" "Release Content"
10  * @e project:      AGESA
11  * @e sub-project:  Core
12  * @e \$Revision: 37854 $   @e \$Date: 2010-09-14 06:35:39 +0800 (Tue, 14 Sep 2010) $
13  */
14 /*
15  *****************************************************************************
16  *
17  * Copyright (c) 2011, Advanced Micro Devices, Inc.
18  * All rights reserved.
19  * 
20  * Redistribution and use in source and binary forms, with or without
21  * modification, are permitted provided that the following conditions are met:
22  *     * Redistributions of source code must retain the above copyright
23  *       notice, this list of conditions and the following disclaimer.
24  *     * Redistributions in binary form must reproduce the above copyright
25  *       notice, this list of conditions and the following disclaimer in the
26  *       documentation and/or other materials provided with the distribution.
27  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of 
28  *       its contributors may be used to endorse or promote products derived 
29  *       from this software without specific prior written permission.
30  * 
31  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41  * 
42  * ***************************************************************************
43  *
44  */
45
46 #ifndef _OPTION_FAMILY_14H_INSTALL_H_
47 #define _OPTION_FAMILY_14H_INSTALL_H_
48
49
50 #include "OptionFamily14hEarlySample.h"
51
52 /*
53  * Common Family 14h routines
54  */
55 extern F_CPU_DISABLE_PSTATE F14DisablePstate;
56 extern F_CPU_TRANSITION_PSTATE F14TransitionPstate;
57 extern F_CPU_GET_TSC_RATE F14GetTscRate;
58 extern F_CPU_GET_NB_FREQ F14GetCurrentNbFrequency;
59 extern F_CPU_GET_NB_PSTATE_INFO F14GetNbPstateInfo;
60 extern F_CPU_IS_NBCOF_INIT_NEEDED F14GetNbCofVidUpdate;
61 extern F_CPU_AP_INITIAL_LAUNCH F14LaunchApCore;
62 extern F_CPU_AMD_GET_AP_MAILBOX_FROM_HARDWARE F14GetApMailboxFromHardware;
63 extern F_CPU_GET_AP_CORE_NUMBER F14GetApCoreNumber;
64 extern F_CORE_ID_POSITION_IN_INITIAL_APIC_ID F14CpuAmdCoreIdPositionInInitialApicId;
65 extern F_CPU_SET_WARM_RESET_FLAG F14SetAgesaWarmResetFlag;
66 extern F_CPU_GET_WARM_RESET_FLAG F14GetAgesaWarmResetFlag;
67 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14BrandIdString1;
68 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14BrandIdString2;
69 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14CacheInfo;
70 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14SysPmTable;
71 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14WheaInitData;
72 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetEmptyArray;
73 extern F_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO F14GetPlatformTypeSpecificInfo;
74 extern F_CPU_GET_IDD_MAX F14GetProcIddMax;
75 extern CONST REGISTER_TABLE ROMDATA F14PciRegisterTable;
76 extern CONST REGISTER_TABLE ROMDATA F14PerCorePciRegisterTable;
77 extern CONST REGISTER_TABLE ROMDATA F14MsrRegisterTable;
78 extern F_CPU_NUMBER_OF_BRANDSTRING_CORES F14GetNumberOfCoresForBrandstring;
79 extern F_GET_EARLY_INIT_TABLE GetF14OnEarlyInitOnCoreTable;
80 extern F_IS_NB_PSTATE_ENABLED F14IsNbPstateEnabled;
81 #if OPTION_EARLY_SAMPLES == TRUE
82   extern CONST REGISTER_TABLE ROMDATA F14EarlySampleMsrRegisterTable;
83 #endif
84
85
86 /*
87  * Install family 14h model 0 support
88  */
89 #ifdef OPTION_FAMILY14H_ON
90   #if OPTION_FAMILY14H_ON == TRUE
91     extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14OnMicroCodePatchesStruct;
92     extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14OnMicrocodeEquivalenceTable;
93
94     #if USES_REGISTER_TABLES == TRUE
95       CONST REGISTER_TABLE ROMDATA *F14OnRegisterTables[] =
96       {
97         #if BASE_FAMILY_PCI == TRUE
98           &F14PciRegisterTable,
99         #endif
100         #if BASE_FAMILY_PCI == TRUE
101           &F14PerCorePciRegisterTable,
102         #endif
103         #if BASE_FAMILY_MSR == TRUE
104           &F14MsrRegisterTable,
105           #if OPTION_EARLY_SAMPLES == TRUE
106             &F14EarlySampleMsrRegisterTable,
107           #endif
108         #endif
109         // the end.
110         NULL
111       };
112     #endif
113
114     #if USES_REGISTER_TABLES == TRUE
115       CONST TABLE_ENTRY_TYPE_DESCRIPTOR ROMDATA F14OnTableEntryTypeDescriptors[] =
116       {
117         {MsrRegister, SetRegisterForMsrEntry},
118         {PciRegister, SetRegisterForPciEntry},
119         {FamSpecificWorkaround, SetRegisterForFamSpecificWorkaroundEntry},
120         // End
121         {TableEntryTypeMax, (PF_DO_TABLE_ENTRY)CommonVoid}
122       };
123     #endif
124
125     CONST CPU_SPECIFIC_SERVICES ROMDATA cpuF14OnServices =
126     {
127       0,
128       #if DISABLE_PSTATE == TRUE
129         F14DisablePstate,
130       #else
131         (PF_CPU_DISABLE_PSTATE) CommonAssert,
132       #endif
133       #if TRANSITION_PSTATE == TRUE
134         F14TransitionPstate,
135       #else
136         (PF_CPU_TRANSITION_PSTATE) CommonAssert,
137       #endif
138       #if PROC_IDD_MAX == TRUE
139         F14GetProcIddMax,
140       #else
141         (PF_CPU_GET_IDD_MAX) CommonAssert,
142       #endif
143       #if GET_TSC_RATE == TRUE
144         F14GetTscRate,
145       #else
146         (PF_CPU_GET_TSC_RATE) CommonAssert,
147       #endif
148       #if GET_NB_FREQ == TRUE
149         F14GetCurrentNbFrequency,
150       #else
151         (PF_CPU_GET_NB_FREQ) CommonAssert,
152       #endif
153       #if GET_NB_FREQ == TRUE
154         F14GetNbPstateInfo,
155       #else
156         (PF_CPU_GET_NB_PSTATE_INFO) CommonAssert,
157       #endif
158       #if IS_NBCOF_INIT_NEEDED == TRUE
159         F14GetNbCofVidUpdate,
160       #else
161         (PF_CPU_IS_NBCOF_INIT_NEEDED) CommonAssert,
162       #endif
163       #if AP_INITIAL_LAUNCH == TRUE
164         F14LaunchApCore,
165       #else
166         (PF_CPU_AP_INITIAL_LAUNCH) CommonAssert,
167       #endif
168       #if (BRAND_STRING1 == TRUE) || (BRAND_STRING2 == TRUE)
169         F14GetNumberOfCoresForBrandstring,
170       #else
171         (PF_CPU_NUMBER_OF_BRANDSTRING_CORES) CommonAssert,
172       #endif
173       #if GET_AP_MAILBOX_FROM_HW == TRUE
174         F14GetApMailboxFromHardware,
175       #else
176         (PF_CPU_AMD_GET_AP_MAILBOX_FROM_HARDWARE) CommonAssert,
177       #endif
178       #if SET_AP_CORE_NUMBER == TRUE
179         (PF_CPU_SET_AP_CORE_NUMBER) CommonVoid,
180       #else
181         (PF_CPU_SET_AP_CORE_NUMBER) CommonAssert,
182       #endif
183       #if GET_AP_CORE_NUMBER == TRUE
184         F14GetApCoreNumber,
185       #else
186         (PF_CPU_GET_AP_CORE_NUMBER) CommonAssert,
187       #endif
188       #if TRANSFER_AP_CORE_NUMBER == TRUE
189         (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonVoid,
190       #else
191         (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonAssert,
192       #endif
193       #if ID_POSITION_INITIAL_APICID == TRUE
194         F14CpuAmdCoreIdPositionInInitialApicId,
195       #else
196         (PF_CORE_ID_POSITION_IN_INITIAL_APIC_ID) CommonAssert,
197       #endif
198       #if SAVE_FEATURES == TRUE
199         (PF_CPU_SAVE_FEATURES) CommonVoid,
200       #else
201         (PF_CPU_SAVE_FEATURES) CommonAssert,
202       #endif
203       #if WRITE_FEATURES == TRUE
204         (PF_CPU_WRITE_FEATURES) CommonVoid,
205       #else
206         (PF_CPU_WRITE_FEATURES) CommonAssert,
207       #endif
208       #if SET_WARM_RESET_FLAG == TRUE
209         F14SetAgesaWarmResetFlag,
210       #else
211         (PF_CPU_SET_WARM_RESET_FLAG) CommonAssert,
212       #endif
213       #if GET_WARM_RESET_FLAG == TRUE
214         F14GetAgesaWarmResetFlag,
215       #else
216         (PF_CPU_GET_WARM_RESET_FLAG) CommonAssert,
217       #endif
218       #if BRAND_STRING1 == TRUE
219         GetF14BrandIdString1,
220       #else
221         (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
222       #endif
223       #if BRAND_STRING2 == TRUE
224         GetF14BrandIdString2,
225       #else
226         (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
227       #endif
228       #if GET_PATCHES == TRUE
229         GetF14OnMicroCodePatchesStruct,
230       #else
231         (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
232       #endif
233       #if GET_PATCHES_EQUIVALENCE_TABLE == TRUE
234         GetF14OnMicrocodeEquivalenceTable,
235       #else
236         (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
237       #endif
238       #if GET_CACHE_INFO == TRUE
239         GetF14CacheInfo,
240       #else
241         (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
242       #endif
243       #if GET_SYSTEM_PM_TABLE == TRUE
244         GetF14SysPmTable,
245       #else
246         (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
247       #endif
248       #if GET_WHEA_INIT == TRUE
249         GetF14WheaInitData,
250       #else
251         (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
252       #endif
253       #if GET_PLATFORM_TYPE_SPECIFIC_INFO == TRUE
254         F14GetPlatformTypeSpecificInfo,
255       #else
256         (PF_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO) CommonAssert,
257       #endif
258       #if IS_NB_PSTATE_ENABLED == TRUE
259         F14IsNbPstateEnabled,
260       #else
261         (PF_IS_NB_PSTATE_ENABLED) CommonAssert,
262       #endif
263       #if (BASE_FAMILY_HT_PCI == TRUE)
264         (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonReturnFalse,
265       #else
266         (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonReturnFalse,
267       #endif
268       #if (BASE_FAMILY_HT_PCI == TRUE)
269         (PF_SET_HT_PHY_REGISTER) CommonVoid,
270       #else
271         (PF_SET_HT_PHY_REGISTER) CommonAssert,
272       #endif
273       #if BASE_FAMILY_PCI == TRUE
274         (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse,
275       #else
276         (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse,
277       #endif
278       #if USES_REGISTER_TABLES == TRUE
279         (REGISTER_TABLE **) F14OnRegisterTables,
280       #else
281         NULL,
282       #endif
283       #if USES_REGISTER_TABLES == TRUE
284         (TABLE_ENTRY_TYPE_DESCRIPTOR *) F14OnTableEntryTypeDescriptors,
285       #else
286         NULL,
287       #endif
288       #if MODEL_SPECIFIC_HT_PCI == TRUE
289         NULL,
290       #else
291         NULL,
292       #endif
293       NULL,
294       InitCacheDisabled,
295       #if AGESA_ENTRY_INIT_EARLY == TRUE
296         GetF14OnEarlyInitOnCoreTable
297       #else
298         (PF_GET_EARLY_INIT_TABLE) CommonVoid
299       #endif
300     };
301
302     #define ON_SOCKETS 1
303     #define ON_MODULES 1
304     #define ON_RECOVERY_SOCKETS 1
305     #define ON_RECOVERY_MODULES 1
306     extern F_CPU_GET_SUBFAMILY_ID_ARRAY GetF14OnLogicalIdAndRev;
307     #define OPT_F14_ON_ID (PF_CPU_GET_SUBFAMILY_ID_ARRAY) GetF14OnLogicalIdAndRev,
308     #ifndef ADVCFG_PLATFORM_SOCKETS
309       #define ADVCFG_PLATFORM_SOCKETS ON_SOCKETS
310     #else
311       #if ADVCFG_PLATFORM_SOCKETS < ON_SOCKETS
312         #undef ADVCFG_PLATFORM_SOCKETS
313         #define ADVCFG_PLATFORM_SOCKETS ON_SOCKETS
314       #endif
315     #endif
316     #ifndef ADVCFG_PLATFORM_MODULES
317       #define ADVCFG_PLATFORM_MODULES ON_MODULES
318     #else
319       #if ADVCFG_PLATFORM_MODULES < ON_MODULES
320         #undef ADVCFG_PLATFORM_MODULES
321         #define ADVCFG_PLATFORM_MODULES ON_MODULES
322       #endif
323     #endif
324
325     #if GET_PATCHES == TRUE
326       #define F14_ON_UCODE_0B
327       #define F14_ON_UCODE_0B_UNENC
328       #define F14_ON_UCODE_1A
329       #define F14_ON_UCODE_1A_UNENC
330       #define F14_ON_UCODE_25
331       #define F14_ON_UCODE_25_UNENC
332
333       // If a patch is required for recovery mode to function properly, add a
334       // conditional for AGESA_ENTRY_INIT_RECOVERY, and pull it in.
335       #if AGESA_ENTRY_INIT_EARLY == TRUE
336         #if OPTION_EARLY_SAMPLES == TRUE
337           extern  CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch0500000B;
338           #undef F14_ON_UCODE_0B
339           #define F14_ON_UCODE_0B &CpuF14MicrocodePatch0500000B,
340
341           extern  CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch0500000B_Unenc;
342           #undef F14_ON_UCODE_0B_UNENC
343           #define F14_ON_UCODE_0B_UNENC &CpuF14MicrocodePatch0500000B_Unenc,
344
345           extern  CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch0500001A;
346           #undef F14_ON_UCODE_1A
347           #define F14_ON_UCODE_1A &CpuF14MicrocodePatch0500001A,
348
349           extern  CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch0500001A_Unenc;
350           #undef F14_ON_UCODE_1A_UNENC
351           #define F14_ON_UCODE_1A_UNENC &CpuF14MicrocodePatch0500001A_Unenc,
352         #endif
353         extern  CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch05000025;
354         #undef F14_ON_UCODE_25
355         #define F14_ON_UCODE_25 &CpuF14MicrocodePatch05000025,
356
357         extern  CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch05000025_Unenc;
358         #undef F14_ON_UCODE_25_UNENC
359         #define F14_ON_UCODE_25_UNENC &CpuF14MicrocodePatch05000025_Unenc,
360       #endif
361
362       CONST MICROCODE_PATCHES ROMDATA *CpuF14OnMicroCodePatchArray[] =
363       {
364         F14_ON_UCODE_0B
365         F14_ON_UCODE_0B_UNENC
366         F14_ON_UCODE_1A
367         F14_ON_UCODE_1A_UNENC
368         F14_ON_UCODE_25
369         F14_ON_UCODE_25_UNENC
370         NULL
371       };
372
373       CONST UINT8 ROMDATA CpuF14OnNumberOfMicrocodePatches = (UINT8) ((sizeof (CpuF14OnMicroCodePatchArray) / sizeof (CpuF14OnMicroCodePatchArray[0])) - 1);
374     #endif
375
376     #if OPTION_EARLY_SAMPLES == TRUE
377       extern F_F14_ES_GET_EARLY_INIT_TABLE GetF14OnEarlySampleEarlyInitTable;
378       extern F_F14_ES_NB_PSTATE_INIT F14NbPstateInitEarlySampleHook;
379       extern F_F14_ES_POWER_PLANE_INIT F14PowerPlaneInitEarlySampleHook;
380
381       CONST F14_ES_CORE_SUPPORT ROMDATA F14EarlySampleCoreSupport =
382       {
383         #if AGESA_ENTRY_INIT_EARLY == TRUE
384           GetF14OnEarlySampleEarlyInitTable,
385           F14PowerPlaneInitEarlySampleHook,
386         #else
387           (PF_F14_ES_GET_EARLY_INIT_TABLE) CommonAssert,
388           (PF_F14_ES_POWER_PLANE_INIT) CommonAssert,
389         #endif
390         #if (AGESA_ENTRY_INIT_POST == TRUE) || (AGESA_ENTRY_INIT_RESUME == TRUE) || (AGESA_ENTRY_INIT_RECOVERY == TRUE)
391           F14NbPstateInitEarlySampleHook
392         #else
393           (PF_F14_ES_NB_PSTATE_INIT) CommonAssert
394         #endif
395       };
396     #else
397       CONST F14_ES_CORE_SUPPORT ROMDATA F14EarlySampleCoreSupport =
398       {
399         #if AGESA_ENTRY_INIT_EARLY == TRUE
400           (PF_F14_ES_GET_EARLY_INIT_TABLE) CommonVoid,
401           (PF_F14_ES_POWER_PLANE_INIT) CommonVoid,
402         #else
403           (PF_F14_ES_GET_EARLY_INIT_TABLE) CommonAssert,
404           (PF_F14_ES_POWER_PLANE_INIT) CommonAssert,
405         #endif
406         #if (AGESA_ENTRY_INIT_POST == TRUE) || (AGESA_ENTRY_INIT_RESUME == TRUE) || (AGESA_ENTRY_INIT_RECOVERY == TRUE)
407           (PF_F14_ES_NB_PSTATE_INIT) CommonVoid
408         #else
409           (PF_F14_ES_NB_PSTATE_INIT) CommonAssert
410         #endif
411       };
412     #endif
413
414     #define OPT_F14_ON_CPU {AMD_FAMILY_14_ON, &cpuF14OnServices},
415   #else  //  OPTION_FAMILY14H_ON == TRUE
416     #define OPT_F14_ON_CPU
417     #define OPT_F14_ON_ID
418   #endif  //  OPTION_FAMILY14H_ON == TRUE
419 #else  //  defined (OPTION_FAMILY14H_ON)
420   #define OPT_F14_ON_CPU
421   #define OPT_F14_ON_ID
422 #endif  //  defined (OPTION_FAMILY14H_ON)
423
424 /*
425  * Install unknown family 14h support
426  */
427
428 #if USES_REGISTER_TABLES == TRUE
429   CONST REGISTER_TABLE ROMDATA *F14UnknownRegisterTables[] =
430   {
431     #if BASE_FAMILY_PCI == TRUE
432       &F14PciRegisterTable,
433     #endif
434     #if BASE_FAMILY_PCI == TRUE
435       &F14PerCorePciRegisterTable,
436     #endif
437     #if BASE_FAMILY_MSR == TRUE
438       &F14MsrRegisterTable,
439     #endif
440     // the end.
441     NULL
442   };
443 #endif
444
445 #if USES_REGISTER_TABLES == TRUE
446   CONST TABLE_ENTRY_TYPE_DESCRIPTOR ROMDATA F14UnknownTableEntryTypeDescriptors[] =
447   {
448     {MsrRegister, SetRegisterForMsrEntry},
449     {PciRegister, SetRegisterForPciEntry},
450     {FamSpecificWorkaround, SetRegisterForFamSpecificWorkaroundEntry},
451     // End
452     {TableEntryTypeMax, (PF_DO_TABLE_ENTRY)CommonVoid}
453   };
454 #endif
455
456 CONST CPU_SPECIFIC_SERVICES ROMDATA cpuF14UnknownServices =
457 {
458   0,
459   #if DISABLE_PSTATE == TRUE
460     F14DisablePstate,
461   #else
462     (PF_CPU_DISABLE_PSTATE) CommonAssert,
463   #endif
464   #if TRANSITION_PSTATE == TRUE
465     F14TransitionPstate,
466   #else
467     (PF_CPU_TRANSITION_PSTATE) CommonAssert,
468   #endif
469   #if PROC_IDD_MAX == TRUE
470     (PF_CPU_GET_IDD_MAX) F14GetProcIddMax,
471   #else
472     (PF_CPU_GET_IDD_MAX) CommonAssert,
473   #endif
474   #if GET_TSC_RATE == TRUE
475     F14GetTscRate,
476   #else
477     (PF_CPU_GET_TSC_RATE) CommonAssert,
478   #endif
479   #if GET_NB_FREQ == TRUE
480     F14GetCurrentNbFrequency,
481   #else
482     (PF_CPU_GET_NB_FREQ) CommonAssert,
483   #endif
484   #if GET_NB_FREQ == TRUE
485     F14GetNbPstateInfo,
486   #else
487     (PF_CPU_GET_NB_PSTATE_INFO) CommonAssert,
488   #endif
489   #if IS_NBCOF_INIT_NEEDED == TRUE
490     F14GetNbCofVidUpdate,
491   #else
492     (PF_CPU_IS_NBCOF_INIT_NEEDED) CommonAssert,
493   #endif
494   #if AP_INITIAL_LAUNCH == TRUE
495     F14LaunchApCore,
496   #else
497     (PF_CPU_AP_INITIAL_LAUNCH) CommonAssert,
498   #endif
499   #if (BRAND_STRING1 == TRUE) || (BRAND_STRING2 == TRUE)
500     F14GetNumberOfCoresForBrandstring,
501   #else
502     (PF_CPU_NUMBER_OF_BRANDSTRING_CORES) CommonAssert,
503   #endif
504   #if GET_AP_MAILBOX_FROM_HW == TRUE
505     F14GetApMailboxFromHardware,
506   #else
507     (PF_CPU_AMD_GET_AP_MAILBOX_FROM_HARDWARE) CommonAssert,
508   #endif
509   #if SET_AP_CORE_NUMBER == TRUE
510     (PF_CPU_SET_AP_CORE_NUMBER) CommonVoid,
511   #else
512     (PF_CPU_SET_AP_CORE_NUMBER) CommonAssert,
513   #endif
514   #if GET_AP_CORE_NUMBER == TRUE
515     F14GetApCoreNumber,
516   #else
517     (PF_CPU_GET_AP_CORE_NUMBER) CommonAssert,
518   #endif
519   #if TRANSFER_AP_CORE_NUMBER == TRUE
520     (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonVoid,
521   #else
522     (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonAssert,
523   #endif
524   #if ID_POSITION_INITIAL_APICID == TRUE
525     F14CpuAmdCoreIdPositionInInitialApicId,
526   #else
527     (PF_CORE_ID_POSITION_IN_INITIAL_APIC_ID) CommonAssert,
528   #endif
529   #if SAVE_FEATURES == TRUE
530     (PF_CPU_SAVE_FEATURES) CommonVoid,
531   #else
532     (PF_CPU_SAVE_FEATURES) CommonAssert,
533   #endif
534   #if WRITE_FEATURES == TRUE
535     (PF_CPU_WRITE_FEATURES) CommonVoid,
536   #else
537     (PF_CPU_WRITE_FEATURES) CommonAssert,
538   #endif
539   #if SET_WARM_RESET_FLAG == TRUE
540     F14SetAgesaWarmResetFlag,
541   #else
542     (PF_CPU_SET_WARM_RESET_FLAG) CommonAssert,
543   #endif
544   #if GET_WARM_RESET_FLAG == TRUE
545     F14GetAgesaWarmResetFlag,
546   #else
547     (PF_CPU_GET_WARM_RESET_FLAG) CommonAssert,
548   #endif
549   #if BRAND_STRING1 == TRUE
550     GetF14BrandIdString1,
551   #else
552     (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
553   #endif
554   #if BRAND_STRING2 == TRUE
555     GetF14BrandIdString2,
556   #else
557     (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
558   #endif
559   #if GET_PATCHES == TRUE
560     GetEmptyArray,
561   #else
562     (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
563   #endif
564   #if GET_PATCHES_EQUIVALENCE_TABLE == TRUE
565     GetEmptyArray,
566   #else
567     (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
568   #endif
569   #if GET_CACHE_INFO == TRUE
570     GetF14CacheInfo,
571   #else
572     (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
573   #endif
574   #if GET_SYSTEM_PM_TABLE == TRUE
575     GetF14SysPmTable,
576   #else
577     (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
578   #endif
579   #if GET_WHEA_INIT == TRUE
580     GetF14WheaInitData,
581   #else
582     (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
583   #endif
584   #if GET_PLATFORM_TYPE_SPECIFIC_INFO == TRUE
585     F14GetPlatformTypeSpecificInfo,
586   #else
587     (PF_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO) CommonAssert,
588   #endif
589   #if IS_NB_PSTATE_ENABLED == TRUE
590     F14IsNbPstateEnabled,
591   #else
592     (PF_IS_NB_PSTATE_ENABLED) CommonAssert,
593   #endif
594   #if (BASE_FAMILY_HT_PCI == TRUE)
595     (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonReturnFalse,
596   #else
597     (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonVoid,
598   #endif
599   #if (BASE_FAMILY_HT_PCI == TRUE)
600     (PF_SET_HT_PHY_REGISTER) CommonVoid,
601   #else
602     (PF_SET_HT_PHY_REGISTER) CommonVoid,
603   #endif
604   #if BASE_FAMILY_PCI == TRUE
605     (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse,
606   #else
607     (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse,
608   #endif
609   #if USES_REGISTER_TABLES == TRUE
610     (REGISTER_TABLE **) F14UnknownRegisterTables,
611   #else
612     NULL,
613   #endif
614   #if USES_REGISTER_TABLES == TRUE
615     (TABLE_ENTRY_TYPE_DESCRIPTOR *) F14UnknownTableEntryTypeDescriptors,
616   #else
617     NULL,
618   #endif
619   #if MODEL_SPECIFIC_HT_PCI == TRUE
620     NULL,
621   #else
622     NULL,
623   #endif
624   NULL,
625   InitCacheDisabled,
626   #if AGESA_ENTRY_INIT_EARLY == TRUE
627     GetF14OnEarlyInitOnCoreTable
628   #else
629     (PF_GET_EARLY_INIT_TABLE) CommonVoid
630   #endif
631 };
632
633  // Family 14h maximum base address is 40 bits. Limit BLDCFG to 40 bits, if appropriate.
634 #if (FAMILY_MMIO_BASE_MASK < 0xFFFFFF0000000000ull)
635   #undef  FAMILY_MMIO_BASE_MASK
636   #define FAMILY_MMIO_BASE_MASK (0xFFFFFF0000000000ull)
637 #endif
638
639 #undef OPT_F14_ID_TABLE
640 #define OPT_F14_ID_TABLE {0x14, {AMD_FAMILY_14, AMD_F14_UNKNOWN}, F14LogicalIdTable, (sizeof (F14LogicalIdTable) / sizeof (F14LogicalIdTable[0]))},
641 #define OPT_F14_UNKNOWN_CPU {AMD_FAMILY_14, &cpuF14UnknownServices},
642
643 #undef OPT_F14_TABLE
644 #define OPT_F14_TABLE   OPT_F14_ON_CPU  OPT_F14_UNKNOWN_CPU
645
646 #if OPTION_FT1_SOCKET_SUPPORT == TRUE
647   extern CONST CPU_BRAND_TABLE ROMDATA F14OnBrandIdString1ArrayFt1;
648   extern CONST CPU_BRAND_TABLE ROMDATA F14OnBrandIdString2ArrayFt1;
649   #define F14_FT1_BRANDSTRING1 &F14OnBrandIdString1ArrayFt1,
650   #define F14_FT1_BRANDSTRING2 &F14OnBrandIdString2ArrayFt1,
651 #else
652   #define F14_FT1_BRANDSTRING1
653   #define F14_FT1_BRANDSTRING2
654 #endif
655
656 #if BRAND_STRING1 == TRUE
657   CONST CPU_BRAND_TABLE ROMDATA *F14BrandIdString1Tables[] =
658   {
659     F14_FT1_BRANDSTRING1
660   };
661
662   CONST UINT8 F14BrandIdString1TableCount = (sizeof (F14BrandIdString1Tables) / sizeof (F14BrandIdString1Tables[0]));
663 #endif
664
665 #if BRAND_STRING2 == TRUE
666   CONST CPU_BRAND_TABLE ROMDATA *F14BrandIdString2Tables[] =
667   {
668     F14_FT1_BRANDSTRING2
669   };
670
671   CONST UINT8 F14BrandIdString2TableCount = (sizeof (F14BrandIdString2Tables) / sizeof (F14BrandIdString2Tables[0]));
672 #endif
673
674 CONST PF_CPU_GET_SUBFAMILY_ID_ARRAY ROMDATA F14LogicalIdTable[] =
675 {
676   OPT_F14_ON_ID
677 };
678
679 #endif  // _OPTION_FAMILY_14H_INSTALL_H_