5 * Install of family 14h support
7 * This file generates the default tables for family 14h processors.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: Core
12 * @e \$Revision: 37854 $ @e \$Date: 2010-09-14 06:35:39 +0800 (Tue, 14 Sep 2010) $
15 *****************************************************************************
17 * Copyright (c) 2011, Advanced Micro Devices, Inc.
18 * All rights reserved.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
46 #ifndef _OPTION_FAMILY_14H_INSTALL_H_
47 #define _OPTION_FAMILY_14H_INSTALL_H_
50 #include "OptionFamily14hEarlySample.h"
53 * Common Family 14h routines
55 extern F_CPU_DISABLE_PSTATE F14DisablePstate;
56 extern F_CPU_TRANSITION_PSTATE F14TransitionPstate;
57 extern F_CPU_GET_TSC_RATE F14GetTscRate;
58 extern F_CPU_GET_NB_FREQ F14GetCurrentNbFrequency;
59 extern F_CPU_GET_NB_PSTATE_INFO F14GetNbPstateInfo;
60 extern F_CPU_IS_NBCOF_INIT_NEEDED F14GetNbCofVidUpdate;
61 extern F_CPU_AP_INITIAL_LAUNCH F14LaunchApCore;
62 extern F_CPU_AMD_GET_AP_MAILBOX_FROM_HARDWARE F14GetApMailboxFromHardware;
63 extern F_CPU_GET_AP_CORE_NUMBER F14GetApCoreNumber;
64 extern F_CORE_ID_POSITION_IN_INITIAL_APIC_ID F14CpuAmdCoreIdPositionInInitialApicId;
65 extern F_CPU_SET_WARM_RESET_FLAG F14SetAgesaWarmResetFlag;
66 extern F_CPU_GET_WARM_RESET_FLAG F14GetAgesaWarmResetFlag;
67 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14BrandIdString1;
68 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14BrandIdString2;
69 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14CacheInfo;
70 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14SysPmTable;
71 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14WheaInitData;
72 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetEmptyArray;
73 extern F_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO F14GetPlatformTypeSpecificInfo;
74 extern F_CPU_GET_IDD_MAX F14GetProcIddMax;
75 extern CONST REGISTER_TABLE ROMDATA F14PciRegisterTable;
76 extern CONST REGISTER_TABLE ROMDATA F14PerCorePciRegisterTable;
77 extern CONST REGISTER_TABLE ROMDATA F14MsrRegisterTable;
78 extern F_CPU_NUMBER_OF_BRANDSTRING_CORES F14GetNumberOfCoresForBrandstring;
79 extern F_GET_EARLY_INIT_TABLE GetF14OnEarlyInitOnCoreTable;
80 extern F_IS_NB_PSTATE_ENABLED F14IsNbPstateEnabled;
81 #if OPTION_EARLY_SAMPLES == TRUE
82 extern CONST REGISTER_TABLE ROMDATA F14EarlySampleMsrRegisterTable;
87 * Install family 14h model 0 support
89 #ifdef OPTION_FAMILY14H_ON
90 #if OPTION_FAMILY14H_ON == TRUE
91 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14OnMicroCodePatchesStruct;
92 extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14OnMicrocodeEquivalenceTable;
94 #if USES_REGISTER_TABLES == TRUE
95 CONST REGISTER_TABLE ROMDATA *F14OnRegisterTables[] =
97 #if BASE_FAMILY_PCI == TRUE
100 #if BASE_FAMILY_PCI == TRUE
101 &F14PerCorePciRegisterTable,
103 #if BASE_FAMILY_MSR == TRUE
104 &F14MsrRegisterTable,
105 #if OPTION_EARLY_SAMPLES == TRUE
106 &F14EarlySampleMsrRegisterTable,
114 #if USES_REGISTER_TABLES == TRUE
115 CONST TABLE_ENTRY_TYPE_DESCRIPTOR ROMDATA F14OnTableEntryTypeDescriptors[] =
117 {MsrRegister, SetRegisterForMsrEntry},
118 {PciRegister, SetRegisterForPciEntry},
119 {FamSpecificWorkaround, SetRegisterForFamSpecificWorkaroundEntry},
121 {TableEntryTypeMax, (PF_DO_TABLE_ENTRY)CommonVoid}
125 CONST CPU_SPECIFIC_SERVICES ROMDATA cpuF14OnServices =
128 #if DISABLE_PSTATE == TRUE
131 (PF_CPU_DISABLE_PSTATE) CommonAssert,
133 #if TRANSITION_PSTATE == TRUE
136 (PF_CPU_TRANSITION_PSTATE) CommonAssert,
138 #if PROC_IDD_MAX == TRUE
141 (PF_CPU_GET_IDD_MAX) CommonAssert,
143 #if GET_TSC_RATE == TRUE
146 (PF_CPU_GET_TSC_RATE) CommonAssert,
148 #if GET_NB_FREQ == TRUE
149 F14GetCurrentNbFrequency,
151 (PF_CPU_GET_NB_FREQ) CommonAssert,
153 #if GET_NB_FREQ == TRUE
156 (PF_CPU_GET_NB_PSTATE_INFO) CommonAssert,
158 #if IS_NBCOF_INIT_NEEDED == TRUE
159 F14GetNbCofVidUpdate,
161 (PF_CPU_IS_NBCOF_INIT_NEEDED) CommonAssert,
163 #if AP_INITIAL_LAUNCH == TRUE
166 (PF_CPU_AP_INITIAL_LAUNCH) CommonAssert,
168 #if (BRAND_STRING1 == TRUE) || (BRAND_STRING2 == TRUE)
169 F14GetNumberOfCoresForBrandstring,
171 (PF_CPU_NUMBER_OF_BRANDSTRING_CORES) CommonAssert,
173 #if GET_AP_MAILBOX_FROM_HW == TRUE
174 F14GetApMailboxFromHardware,
176 (PF_CPU_AMD_GET_AP_MAILBOX_FROM_HARDWARE) CommonAssert,
178 #if SET_AP_CORE_NUMBER == TRUE
179 (PF_CPU_SET_AP_CORE_NUMBER) CommonVoid,
181 (PF_CPU_SET_AP_CORE_NUMBER) CommonAssert,
183 #if GET_AP_CORE_NUMBER == TRUE
186 (PF_CPU_GET_AP_CORE_NUMBER) CommonAssert,
188 #if TRANSFER_AP_CORE_NUMBER == TRUE
189 (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonVoid,
191 (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonAssert,
193 #if ID_POSITION_INITIAL_APICID == TRUE
194 F14CpuAmdCoreIdPositionInInitialApicId,
196 (PF_CORE_ID_POSITION_IN_INITIAL_APIC_ID) CommonAssert,
198 #if SAVE_FEATURES == TRUE
199 (PF_CPU_SAVE_FEATURES) CommonVoid,
201 (PF_CPU_SAVE_FEATURES) CommonAssert,
203 #if WRITE_FEATURES == TRUE
204 (PF_CPU_WRITE_FEATURES) CommonVoid,
206 (PF_CPU_WRITE_FEATURES) CommonAssert,
208 #if SET_WARM_RESET_FLAG == TRUE
209 F14SetAgesaWarmResetFlag,
211 (PF_CPU_SET_WARM_RESET_FLAG) CommonAssert,
213 #if GET_WARM_RESET_FLAG == TRUE
214 F14GetAgesaWarmResetFlag,
216 (PF_CPU_GET_WARM_RESET_FLAG) CommonAssert,
218 #if BRAND_STRING1 == TRUE
219 GetF14BrandIdString1,
221 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
223 #if BRAND_STRING2 == TRUE
224 GetF14BrandIdString2,
226 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
228 #if GET_PATCHES == TRUE
229 GetF14OnMicroCodePatchesStruct,
231 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
233 #if GET_PATCHES_EQUIVALENCE_TABLE == TRUE
234 GetF14OnMicrocodeEquivalenceTable,
236 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
238 #if GET_CACHE_INFO == TRUE
241 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
243 #if GET_SYSTEM_PM_TABLE == TRUE
246 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
248 #if GET_WHEA_INIT == TRUE
251 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
253 #if GET_PLATFORM_TYPE_SPECIFIC_INFO == TRUE
254 F14GetPlatformTypeSpecificInfo,
256 (PF_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO) CommonAssert,
258 #if IS_NB_PSTATE_ENABLED == TRUE
259 F14IsNbPstateEnabled,
261 (PF_IS_NB_PSTATE_ENABLED) CommonAssert,
263 #if (BASE_FAMILY_HT_PCI == TRUE)
264 (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonReturnFalse,
266 (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonReturnFalse,
268 #if (BASE_FAMILY_HT_PCI == TRUE)
269 (PF_SET_HT_PHY_REGISTER) CommonVoid,
271 (PF_SET_HT_PHY_REGISTER) CommonAssert,
273 #if BASE_FAMILY_PCI == TRUE
274 (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse,
276 (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse,
278 #if USES_REGISTER_TABLES == TRUE
279 (REGISTER_TABLE **) F14OnRegisterTables,
283 #if USES_REGISTER_TABLES == TRUE
284 (TABLE_ENTRY_TYPE_DESCRIPTOR *) F14OnTableEntryTypeDescriptors,
288 #if MODEL_SPECIFIC_HT_PCI == TRUE
295 #if AGESA_ENTRY_INIT_EARLY == TRUE
296 GetF14OnEarlyInitOnCoreTable
298 (PF_GET_EARLY_INIT_TABLE) CommonVoid
304 #define ON_RECOVERY_SOCKETS 1
305 #define ON_RECOVERY_MODULES 1
306 extern F_CPU_GET_SUBFAMILY_ID_ARRAY GetF14OnLogicalIdAndRev;
307 #define OPT_F14_ON_ID (PF_CPU_GET_SUBFAMILY_ID_ARRAY) GetF14OnLogicalIdAndRev,
308 #ifndef ADVCFG_PLATFORM_SOCKETS
309 #define ADVCFG_PLATFORM_SOCKETS ON_SOCKETS
311 #if ADVCFG_PLATFORM_SOCKETS < ON_SOCKETS
312 #undef ADVCFG_PLATFORM_SOCKETS
313 #define ADVCFG_PLATFORM_SOCKETS ON_SOCKETS
316 #ifndef ADVCFG_PLATFORM_MODULES
317 #define ADVCFG_PLATFORM_MODULES ON_MODULES
319 #if ADVCFG_PLATFORM_MODULES < ON_MODULES
320 #undef ADVCFG_PLATFORM_MODULES
321 #define ADVCFG_PLATFORM_MODULES ON_MODULES
325 #if GET_PATCHES == TRUE
326 #define F14_ON_UCODE_0B
327 #define F14_ON_UCODE_0B_UNENC
328 #define F14_ON_UCODE_1A
329 #define F14_ON_UCODE_1A_UNENC
330 #define F14_ON_UCODE_25
331 #define F14_ON_UCODE_25_UNENC
333 // If a patch is required for recovery mode to function properly, add a
334 // conditional for AGESA_ENTRY_INIT_RECOVERY, and pull it in.
335 #if AGESA_ENTRY_INIT_EARLY == TRUE
336 #if OPTION_EARLY_SAMPLES == TRUE
337 extern CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch0500000B;
338 #undef F14_ON_UCODE_0B
339 #define F14_ON_UCODE_0B &CpuF14MicrocodePatch0500000B,
341 extern CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch0500000B_Unenc;
342 #undef F14_ON_UCODE_0B_UNENC
343 #define F14_ON_UCODE_0B_UNENC &CpuF14MicrocodePatch0500000B_Unenc,
345 extern CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch0500001A;
346 #undef F14_ON_UCODE_1A
347 #define F14_ON_UCODE_1A &CpuF14MicrocodePatch0500001A,
349 extern CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch0500001A_Unenc;
350 #undef F14_ON_UCODE_1A_UNENC
351 #define F14_ON_UCODE_1A_UNENC &CpuF14MicrocodePatch0500001A_Unenc,
353 extern CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch05000025;
354 #undef F14_ON_UCODE_25
355 #define F14_ON_UCODE_25 &CpuF14MicrocodePatch05000025,
357 extern CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch05000025_Unenc;
358 #undef F14_ON_UCODE_25_UNENC
359 #define F14_ON_UCODE_25_UNENC &CpuF14MicrocodePatch05000025_Unenc,
362 CONST MICROCODE_PATCHES ROMDATA *CpuF14OnMicroCodePatchArray[] =
365 F14_ON_UCODE_0B_UNENC
367 F14_ON_UCODE_1A_UNENC
369 F14_ON_UCODE_25_UNENC
373 CONST UINT8 ROMDATA CpuF14OnNumberOfMicrocodePatches = (UINT8) ((sizeof (CpuF14OnMicroCodePatchArray) / sizeof (CpuF14OnMicroCodePatchArray[0])) - 1);
376 #if OPTION_EARLY_SAMPLES == TRUE
377 extern F_F14_ES_GET_EARLY_INIT_TABLE GetF14OnEarlySampleEarlyInitTable;
378 extern F_F14_ES_NB_PSTATE_INIT F14NbPstateInitEarlySampleHook;
379 extern F_F14_ES_POWER_PLANE_INIT F14PowerPlaneInitEarlySampleHook;
381 CONST F14_ES_CORE_SUPPORT ROMDATA F14EarlySampleCoreSupport =
383 #if AGESA_ENTRY_INIT_EARLY == TRUE
384 GetF14OnEarlySampleEarlyInitTable,
385 F14PowerPlaneInitEarlySampleHook,
387 (PF_F14_ES_GET_EARLY_INIT_TABLE) CommonAssert,
388 (PF_F14_ES_POWER_PLANE_INIT) CommonAssert,
390 #if (AGESA_ENTRY_INIT_POST == TRUE) || (AGESA_ENTRY_INIT_RESUME == TRUE) || (AGESA_ENTRY_INIT_RECOVERY == TRUE)
391 F14NbPstateInitEarlySampleHook
393 (PF_F14_ES_NB_PSTATE_INIT) CommonAssert
397 CONST F14_ES_CORE_SUPPORT ROMDATA F14EarlySampleCoreSupport =
399 #if AGESA_ENTRY_INIT_EARLY == TRUE
400 (PF_F14_ES_GET_EARLY_INIT_TABLE) CommonVoid,
401 (PF_F14_ES_POWER_PLANE_INIT) CommonVoid,
403 (PF_F14_ES_GET_EARLY_INIT_TABLE) CommonAssert,
404 (PF_F14_ES_POWER_PLANE_INIT) CommonAssert,
406 #if (AGESA_ENTRY_INIT_POST == TRUE) || (AGESA_ENTRY_INIT_RESUME == TRUE) || (AGESA_ENTRY_INIT_RECOVERY == TRUE)
407 (PF_F14_ES_NB_PSTATE_INIT) CommonVoid
409 (PF_F14_ES_NB_PSTATE_INIT) CommonAssert
414 #define OPT_F14_ON_CPU {AMD_FAMILY_14_ON, &cpuF14OnServices},
415 #else // OPTION_FAMILY14H_ON == TRUE
416 #define OPT_F14_ON_CPU
417 #define OPT_F14_ON_ID
418 #endif // OPTION_FAMILY14H_ON == TRUE
419 #else // defined (OPTION_FAMILY14H_ON)
420 #define OPT_F14_ON_CPU
421 #define OPT_F14_ON_ID
422 #endif // defined (OPTION_FAMILY14H_ON)
425 * Install unknown family 14h support
428 #if USES_REGISTER_TABLES == TRUE
429 CONST REGISTER_TABLE ROMDATA *F14UnknownRegisterTables[] =
431 #if BASE_FAMILY_PCI == TRUE
432 &F14PciRegisterTable,
434 #if BASE_FAMILY_PCI == TRUE
435 &F14PerCorePciRegisterTable,
437 #if BASE_FAMILY_MSR == TRUE
438 &F14MsrRegisterTable,
445 #if USES_REGISTER_TABLES == TRUE
446 CONST TABLE_ENTRY_TYPE_DESCRIPTOR ROMDATA F14UnknownTableEntryTypeDescriptors[] =
448 {MsrRegister, SetRegisterForMsrEntry},
449 {PciRegister, SetRegisterForPciEntry},
450 {FamSpecificWorkaround, SetRegisterForFamSpecificWorkaroundEntry},
452 {TableEntryTypeMax, (PF_DO_TABLE_ENTRY)CommonVoid}
456 CONST CPU_SPECIFIC_SERVICES ROMDATA cpuF14UnknownServices =
459 #if DISABLE_PSTATE == TRUE
462 (PF_CPU_DISABLE_PSTATE) CommonAssert,
464 #if TRANSITION_PSTATE == TRUE
467 (PF_CPU_TRANSITION_PSTATE) CommonAssert,
469 #if PROC_IDD_MAX == TRUE
470 (PF_CPU_GET_IDD_MAX) F14GetProcIddMax,
472 (PF_CPU_GET_IDD_MAX) CommonAssert,
474 #if GET_TSC_RATE == TRUE
477 (PF_CPU_GET_TSC_RATE) CommonAssert,
479 #if GET_NB_FREQ == TRUE
480 F14GetCurrentNbFrequency,
482 (PF_CPU_GET_NB_FREQ) CommonAssert,
484 #if GET_NB_FREQ == TRUE
487 (PF_CPU_GET_NB_PSTATE_INFO) CommonAssert,
489 #if IS_NBCOF_INIT_NEEDED == TRUE
490 F14GetNbCofVidUpdate,
492 (PF_CPU_IS_NBCOF_INIT_NEEDED) CommonAssert,
494 #if AP_INITIAL_LAUNCH == TRUE
497 (PF_CPU_AP_INITIAL_LAUNCH) CommonAssert,
499 #if (BRAND_STRING1 == TRUE) || (BRAND_STRING2 == TRUE)
500 F14GetNumberOfCoresForBrandstring,
502 (PF_CPU_NUMBER_OF_BRANDSTRING_CORES) CommonAssert,
504 #if GET_AP_MAILBOX_FROM_HW == TRUE
505 F14GetApMailboxFromHardware,
507 (PF_CPU_AMD_GET_AP_MAILBOX_FROM_HARDWARE) CommonAssert,
509 #if SET_AP_CORE_NUMBER == TRUE
510 (PF_CPU_SET_AP_CORE_NUMBER) CommonVoid,
512 (PF_CPU_SET_AP_CORE_NUMBER) CommonAssert,
514 #if GET_AP_CORE_NUMBER == TRUE
517 (PF_CPU_GET_AP_CORE_NUMBER) CommonAssert,
519 #if TRANSFER_AP_CORE_NUMBER == TRUE
520 (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonVoid,
522 (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonAssert,
524 #if ID_POSITION_INITIAL_APICID == TRUE
525 F14CpuAmdCoreIdPositionInInitialApicId,
527 (PF_CORE_ID_POSITION_IN_INITIAL_APIC_ID) CommonAssert,
529 #if SAVE_FEATURES == TRUE
530 (PF_CPU_SAVE_FEATURES) CommonVoid,
532 (PF_CPU_SAVE_FEATURES) CommonAssert,
534 #if WRITE_FEATURES == TRUE
535 (PF_CPU_WRITE_FEATURES) CommonVoid,
537 (PF_CPU_WRITE_FEATURES) CommonAssert,
539 #if SET_WARM_RESET_FLAG == TRUE
540 F14SetAgesaWarmResetFlag,
542 (PF_CPU_SET_WARM_RESET_FLAG) CommonAssert,
544 #if GET_WARM_RESET_FLAG == TRUE
545 F14GetAgesaWarmResetFlag,
547 (PF_CPU_GET_WARM_RESET_FLAG) CommonAssert,
549 #if BRAND_STRING1 == TRUE
550 GetF14BrandIdString1,
552 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
554 #if BRAND_STRING2 == TRUE
555 GetF14BrandIdString2,
557 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
559 #if GET_PATCHES == TRUE
562 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
564 #if GET_PATCHES_EQUIVALENCE_TABLE == TRUE
567 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
569 #if GET_CACHE_INFO == TRUE
572 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
574 #if GET_SYSTEM_PM_TABLE == TRUE
577 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
579 #if GET_WHEA_INIT == TRUE
582 (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert,
584 #if GET_PLATFORM_TYPE_SPECIFIC_INFO == TRUE
585 F14GetPlatformTypeSpecificInfo,
587 (PF_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO) CommonAssert,
589 #if IS_NB_PSTATE_ENABLED == TRUE
590 F14IsNbPstateEnabled,
592 (PF_IS_NB_PSTATE_ENABLED) CommonAssert,
594 #if (BASE_FAMILY_HT_PCI == TRUE)
595 (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonReturnFalse,
597 (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonVoid,
599 #if (BASE_FAMILY_HT_PCI == TRUE)
600 (PF_SET_HT_PHY_REGISTER) CommonVoid,
602 (PF_SET_HT_PHY_REGISTER) CommonVoid,
604 #if BASE_FAMILY_PCI == TRUE
605 (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse,
607 (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse,
609 #if USES_REGISTER_TABLES == TRUE
610 (REGISTER_TABLE **) F14UnknownRegisterTables,
614 #if USES_REGISTER_TABLES == TRUE
615 (TABLE_ENTRY_TYPE_DESCRIPTOR *) F14UnknownTableEntryTypeDescriptors,
619 #if MODEL_SPECIFIC_HT_PCI == TRUE
626 #if AGESA_ENTRY_INIT_EARLY == TRUE
627 GetF14OnEarlyInitOnCoreTable
629 (PF_GET_EARLY_INIT_TABLE) CommonVoid
633 // Family 14h maximum base address is 40 bits. Limit BLDCFG to 40 bits, if appropriate.
634 #if (FAMILY_MMIO_BASE_MASK < 0xFFFFFF0000000000ull)
635 #undef FAMILY_MMIO_BASE_MASK
636 #define FAMILY_MMIO_BASE_MASK (0xFFFFFF0000000000ull)
639 #undef OPT_F14_ID_TABLE
640 #define OPT_F14_ID_TABLE {0x14, {AMD_FAMILY_14, AMD_F14_UNKNOWN}, F14LogicalIdTable, (sizeof (F14LogicalIdTable) / sizeof (F14LogicalIdTable[0]))},
641 #define OPT_F14_UNKNOWN_CPU {AMD_FAMILY_14, &cpuF14UnknownServices},
644 #define OPT_F14_TABLE OPT_F14_ON_CPU OPT_F14_UNKNOWN_CPU
646 #if OPTION_FT1_SOCKET_SUPPORT == TRUE
647 extern CONST CPU_BRAND_TABLE ROMDATA F14OnBrandIdString1ArrayFt1;
648 extern CONST CPU_BRAND_TABLE ROMDATA F14OnBrandIdString2ArrayFt1;
649 #define F14_FT1_BRANDSTRING1 &F14OnBrandIdString1ArrayFt1,
650 #define F14_FT1_BRANDSTRING2 &F14OnBrandIdString2ArrayFt1,
652 #define F14_FT1_BRANDSTRING1
653 #define F14_FT1_BRANDSTRING2
656 #if BRAND_STRING1 == TRUE
657 CONST CPU_BRAND_TABLE ROMDATA *F14BrandIdString1Tables[] =
662 CONST UINT8 F14BrandIdString1TableCount = (sizeof (F14BrandIdString1Tables) / sizeof (F14BrandIdString1Tables[0]));
665 #if BRAND_STRING2 == TRUE
666 CONST CPU_BRAND_TABLE ROMDATA *F14BrandIdString2Tables[] =
671 CONST UINT8 F14BrandIdString2TableCount = (sizeof (F14BrandIdString2Tables) / sizeof (F14BrandIdString2Tables[0]));
674 CONST PF_CPU_GET_SUBFAMILY_ID_ARRAY ROMDATA F14LogicalIdTable[] =
679 #endif // _OPTION_FAMILY_14H_INSTALL_H_