2 * This file is part of the coreboot project.
4 * Copyright (C) 2000 AG Electronics Ltd.
5 * Copyright (C) 2003-2004 Linux Networx
6 * Copyright (C) 2004 Tyan
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 #include <device/device.h>
25 #include <device/pnp.h>
26 #include <console/console.h>
30 #include <pc80/keyboard.h>
32 #include "w83627thg.h"
34 static void w83627thg_enter_ext_func_mode(device_t dev)
36 outb(0x87, dev->path.pnp.port);
37 outb(0x87, dev->path.pnp.port);
40 static void w83627thg_exit_ext_func_mode(device_t dev)
42 outb(0xaa, dev->path.pnp.port);
45 static void w83627thg_init(device_t dev)
47 struct superio_winbond_w83627thg_config *conf = dev->chip_info;
48 struct resource *res0;
53 switch(dev->path.pnp.device) {
55 res0 = find_resource(dev, PNP_IDX_IO0);
56 init_uart8250(res0->base, &conf->com1);
59 res0 = find_resource(dev, PNP_IDX_IO0);
60 init_uart8250(res0->base, &conf->com2);
63 pc_keyboard_init(&conf->keyboard);
68 static void w83627thg_set_resources(device_t dev)
70 w83627thg_enter_ext_func_mode(dev);
71 pnp_set_resources(dev);
72 w83627thg_exit_ext_func_mode(dev);
75 static void w83627thg_enable_resources(device_t dev)
77 w83627thg_enter_ext_func_mode(dev);
78 pnp_enable_resources(dev);
79 w83627thg_exit_ext_func_mode(dev);
82 static void w83627thg_enable(device_t dev)
84 w83627thg_enter_ext_func_mode(dev);
86 w83627thg_exit_ext_func_mode(dev);
89 static struct device_operations ops = {
90 .read_resources = pnp_read_resources,
91 .set_resources = w83627thg_set_resources,
92 .enable_resources = w83627thg_enable_resources,
93 .enable = w83627thg_enable,
94 .init = w83627thg_init,
97 static struct pnp_info pnp_dev_info[] = {
98 { &ops, W83627THG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
99 { &ops, W83627THG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
100 { &ops, W83627THG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
101 { &ops, W83627THG_SP2, PNP_IO0 | PNP_IRQ0 | PNP_MSC1, { 0x7f8, 0 }, },
102 { &ops, W83627THG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1 | PNP_MSC0, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
103 { &ops, W83627THG_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
104 { &ops, W83627THG_GPIO2,},
105 { &ops, W83627THG_GPIO3, PNP_EN | PNP_MSC0 | PNP_MSC1, },
106 { &ops, W83627THG_ACPI, PNP_IRQ0, },
107 { &ops, W83627THG_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } },
110 static void enable_dev(device_t dev)
112 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
115 struct chip_operations superio_winbond_w83627thg_ops = {
116 CHIP_NAME("Winbond W83627THG Super I/O")
117 .enable_dev = enable_dev,