src/superio/winbond/w83627thg/superio.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2000 AG Electronics Ltd.
   5  * Copyright (C) 2003-2004 Linux Networx
   6  * Copyright (C) 2004 Tyan
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  21  */
  22
  23 #include <arch/io.h>
  24 #include <device/device.h>
  25 #include <device/pnp.h>
  26 #include <console/console.h>
  27 #include <string.h>
  28 #include <bitops.h>
  29 #include <uart8250.h>
  30 #include <pc80/keyboard.h>
  31 #include "chip.h"
  32 #include "w83627thg.h"
  33
  34 static void w83627thg_enter_ext_func_mode(device_t dev)
  35 {
  36         outb(0x87, dev->path.pnp.port);
  37         outb(0x87, dev->path.pnp.port);
  38 }
  39
  40 static void w83627thg_exit_ext_func_mode(device_t dev)
  41 {
  42         outb(0xaa, dev->path.pnp.port);
  43 }
  44
  45 static void w83627thg_init(device_t dev)
  46 {
  47         struct superio_winbond_w83627thg_config *conf = dev->chip_info;
  48         struct resource *res0, *res1;
  49
  50         if (!dev->enabled)
  51                 return;
  52
  53         switch(dev->path.pnp.device) {
  54         case W83627THG_SP1:
  55                 res0 = find_resource(dev, PNP_IDX_IO0);
  56                 init_uart8250(res0->base, &conf->com1);
  57                 break;
  58         case W83627THG_SP2:
  59                 res0 = find_resource(dev, PNP_IDX_IO0);
  60                 init_uart8250(res0->base, &conf->com2);
  61                 break;
  62         case W83627THG_KBC:
  63                 res0 = find_resource(dev, PNP_IDX_IO0);
  64                 res1 = find_resource(dev, PNP_IDX_IO1);
  65                 pc_keyboard_init(&conf->keyboard);
  66                 break;
  67         }
  68 }
  69
  70 static void w83627thg_set_resources(device_t dev)
  71 {
  72         w83627thg_enter_ext_func_mode(dev);
  73         pnp_set_resources(dev);
  74         w83627thg_exit_ext_func_mode(dev);
  75 }
  76
  77 static void w83627thg_enable_resources(device_t dev)
  78 {
  79         w83627thg_enter_ext_func_mode(dev);
  80         pnp_enable_resources(dev);
  81         w83627thg_exit_ext_func_mode(dev);
  82 }
  83
  84 static void w83627thg_enable(device_t dev)
  85 {
  86         w83627thg_enter_ext_func_mode(dev);
  87         pnp_enable(dev);
  88         w83627thg_exit_ext_func_mode(dev);
  89 }
  90
  91 static struct device_operations ops = {
  92         .read_resources   = pnp_read_resources,
  93         .set_resources    = w83627thg_set_resources,
  94         .enable_resources = w83627thg_enable_resources,
  95         .enable           = w83627thg_enable,
  96         .init             = w83627thg_init,
  97 };
  98
  99 static struct pnp_info pnp_dev_info[] = {
 100         { &ops, W83627THG_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
 101         { &ops, W83627THG_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
 102         { &ops, W83627THG_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 103         { &ops, W83627THG_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_MSC1, { 0x7f8, 0 }, },
 104         { &ops, W83627THG_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1 | PNP_MSC0, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
 105         { &ops, W83627THG_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
 106         { &ops, W83627THG_GPIO2,},
 107         { &ops, W83627THG_GPIO3, PNP_EN | PNP_MSC0 | PNP_MSC1, },
 108         { &ops, W83627THG_ACPI, PNP_IRQ0,  },
 109         { &ops, W83627THG_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } },
 110 };
 111
 112 static void enable_dev(device_t dev)
 113 {
 114         pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
 115 }
 116
 117 struct chip_operations superio_winbond_w83627thg_ops = {
 118         CHIP_NAME("Winbond W83627THG Super I/O")
 119         .enable_dev = enable_dev,
 120 };