src/superio/winbond/w83627thf/superio.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2000 AG Electronics Ltd.
   5  * Copyright (C) 2003-2004 Linux Networx
   6  * Copyright (C) 2004 Tyan
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  21  */
  22
  23 #include <arch/io.h>
  24 #include <device/device.h>
  25 #include <device/pnp.h>
  26 #include <console/console.h>
  27 #include <string.h>
  28 #include <bitops.h>
  29 #include <uart8250.h>
  30 #include <pc80/keyboard.h>
  31 #include <stdlib.h>
  32 #include "chip.h"
  33 #include "w83627thf.h"
  34
  35 static void w83627thf_enter_ext_func_mode(device_t dev)
  36 {
  37         outb(0x87, dev->path.pnp.port);
  38         outb(0x87, dev->path.pnp.port);
  39 }
  40
  41 static void w83627thf_exit_ext_func_mode(device_t dev)
  42 {
  43         outb(0xaa, dev->path.pnp.port);
  44 }
  45
  46 static void w83627thf_init(device_t dev)
  47 {
  48         struct superio_winbond_w83627thf_config *conf = dev->chip_info;
  49         struct resource *res0;
  50
  51         if (!dev->enabled)
  52                 return;
  53
  54         switch(dev->path.pnp.device) {
  55         case W83627THF_SP1:
  56                 res0 = find_resource(dev, PNP_IDX_IO0);
  57                 init_uart8250(res0->base, &conf->com1);
  58                 break;
  59         case W83627THF_SP2:
  60                 res0 = find_resource(dev, PNP_IDX_IO0);
  61                 init_uart8250(res0->base, &conf->com2);
  62                 break;
  63         case W83627THF_KBC:
  64                 pc_keyboard_init(&conf->keyboard);
  65                 break;
  66         }
  67 }
  68
  69 static void w83627thf_set_resources(device_t dev)
  70 {
  71         w83627thf_enter_ext_func_mode(dev);
  72         pnp_set_resources(dev);
  73         w83627thf_exit_ext_func_mode(dev);
  74 }
  75
  76 static void w83627thf_enable_resources(device_t dev)
  77 {
  78         w83627thf_enter_ext_func_mode(dev);
  79         pnp_enable_resources(dev);
  80         w83627thf_exit_ext_func_mode(dev);
  81 }
  82
  83 static void w83627thf_enable(device_t dev)
  84 {
  85         w83627thf_enter_ext_func_mode(dev);
  86         pnp_enable(dev);
  87         w83627thf_exit_ext_func_mode(dev);
  88 }
  89
  90 static struct device_operations ops = {
  91         .read_resources   = pnp_read_resources,
  92         .set_resources    = w83627thf_set_resources,
  93         .enable_resources = w83627thf_enable_resources,
  94         .enable           = w83627thf_enable,
  95         .init             = w83627thf_init,
  96 };
  97
  98 static struct pnp_info pnp_dev_info[] = {
  99         { &ops, W83627THF_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
 100         { &ops, W83627THF_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
 101         { &ops, W83627THF_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 102         { &ops, W83627THF_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 103         { &ops, W83627THF_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
 104         { &ops, W83627THF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 105         { &ops, W83627THF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
 106         /* { W83627THF_GPIO2,}, */
 107         /* { W83627THF_GPIO3,}, */
 108         { &ops, W83627THF_ACPI, PNP_IRQ0,  },
 109         { &ops, W83627THF_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } },
 110 };
 111
 112 static void enable_dev(device_t dev)
 113 {
 114         pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
 115 }
 116
 117 struct chip_operations superio_winbond_w83627thf_ops = {
 118         CHIP_NAME("Winbond W83627THF Super I/O")
 119         .enable_dev = enable_dev,
 120 };