2 * This file is part of the coreboot project.
4 * Copyright (C) 2005 Digital Design Corporation
5 * Copyright (C) 2008-2009 coresystems GmbH
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 /* RAM-based driver for SMSC LPC47N227 Super I/O chip. */
24 #include <device/device.h>
25 #include <device/pnp.h>
26 #include <console/console.h>
27 #include <device/smbus.h>
34 #include "lpc47n227.h"
36 /* Forward declarations. */
37 static void enable_dev(device_t dev);
38 void lpc47n227_pnp_set_resources(device_t dev);
39 void lpc47n227_pnp_enable_resources(device_t dev);
40 void lpc47n227_pnp_enable(device_t dev);
41 static void lpc47n227_init(device_t dev);
42 static void lpc47n227_pnp_set_resource(device_t dev, struct resource *resource);
43 void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase);
44 void lpc47n227_pnp_set_drq(device_t dev, u8 drq);
45 void lpc47n227_pnp_set_irq(device_t dev, u8 irq);
46 void lpc47n227_pnp_set_enable(device_t dev, int enable);
47 static void pnp_enter_conf_state(device_t dev);
48 static void pnp_exit_conf_state(device_t dev);
50 struct chip_operations superio_smsc_lpc47n227_ops = {
51 CHIP_NAME("SMSC LPC47N227 Super I/O")
52 .enable_dev = enable_dev,
55 static struct device_operations ops = {
56 .read_resources = pnp_read_resources,
57 .set_resources = lpc47n227_pnp_set_resources,
58 .enable_resources = lpc47n227_pnp_enable_resources,
59 .enable = lpc47n227_pnp_enable,
60 .init = lpc47n227_init,
63 static struct pnp_info pnp_dev_info[] = {
64 { &ops, LPC47N227_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
65 { &ops, LPC47N227_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
66 { &ops, LPC47N227_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
67 { &ops, LPC47N227_KBDC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
71 * Create device structures and allocate resources to devices specified in the
72 * pnp_dev_info array (above).
74 * @param dev Pointer to structure describing a Super I/O device.
76 static void enable_dev(device_t dev)
78 pnp_enable_devices(dev, &pnp_ops,
79 ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
83 * Configure the specified Super I/O device with the resources (I/O space,
84 * etc.) that have been allocate for it.
86 * NOTE: Cannot use pnp_set_resources() here because it assumes chip
87 * support for logical devices, which the LPC47N227 doesn't have.
89 * @param dev Pointer to structure describing a Super I/O device.
91 void lpc47n227_pnp_set_resources(device_t dev)
95 pnp_enter_conf_state(dev);
96 for (res = dev->resource_list; res; res = res->next)
97 lpc47n227_pnp_set_resource(dev, res);
98 pnp_exit_conf_state(dev);
102 * NOTE: Cannot use pnp_enable_resources() here because it assumes chip
103 * support for logical devices, which the LPC47N227 doesn't have.
105 void lpc47n227_pnp_enable_resources(device_t dev)
107 pnp_enter_conf_state(dev);
108 lpc47n227_pnp_set_enable(dev, 1);
109 pnp_exit_conf_state(dev);
113 * NOTE: Cannot use pnp_set_enable() here because it assumes chip
114 * support for logical devices, which the LPC47N227 doesn't have.
116 void lpc47n227_pnp_enable(device_t dev)
118 pnp_enter_conf_state(dev);
119 lpc47n227_pnp_set_enable(dev, !!dev->enabled);
120 pnp_exit_conf_state(dev);
124 * Initialize the specified Super I/O device.
126 * Devices other than COM ports and keyboard controller are ignored.
127 * For COM ports, we configure the baud rate.
129 * @param dev Pointer to structure describing a Super I/O device.
131 static void lpc47n227_init(device_t dev)
133 struct superio_smsc_lpc47n227_config *conf = dev->chip_info;
138 switch (dev->path.pnp.device) {
140 printk(BIOS_DEBUG, "LPC47N227: Initializing keyboard.\n");
141 pc_keyboard_init(&conf->keyboard);
146 static void lpc47n227_pnp_set_resource(device_t dev, struct resource *resource)
148 if (!(resource->flags & IORESOURCE_ASSIGNED)) {
149 printk(BIOS_ERR, "ERROR: %s %02lx not allocated\n",
150 dev_path(dev), resource->index);
154 /* Now store the resource. */
156 * NOTE: Cannot use pnp_set_XXX() here because they assume chip
157 * support for logical devices, which the LPC47N227 doesn't have.
159 if (resource->flags & IORESOURCE_IO) {
160 lpc47n227_pnp_set_iobase(dev, resource->base);
161 } else if (resource->flags & IORESOURCE_DRQ) {
162 lpc47n227_pnp_set_drq(dev, resource->base);
163 } else if (resource->flags & IORESOURCE_IRQ) {
164 lpc47n227_pnp_set_irq(dev, resource->base);
166 printk(BIOS_ERR, "ERROR: %s %02lx unknown resource type\n",
167 dev_path(dev), resource->index);
170 resource->flags |= IORESOURCE_STORED;
172 report_resource_stored(dev, resource, "");
175 void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase)
177 ASSERT(!(iobase & 0x3));
179 switch (dev->path.pnp.device) {
181 pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
184 pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
187 pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
197 void lpc47n227_pnp_set_drq(device_t dev, u8 drq)
199 const u8 PP_DMA_MASK = 0x0F;
200 const u8 PP_DMA_SELECTION_REGISTER = 0x26;
201 u8 current_config, new_config;
203 if (dev->path.pnp.device == LPC47N227_PP) {
204 current_config = pnp_read_config(dev,
205 PP_DMA_SELECTION_REGISTER);
206 ASSERT(!(drq & ~PP_DMA_MASK)); // DRQ out of range??
207 new_config = (current_config & ~PP_DMA_MASK) | drq;
208 pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config);
214 void lpc47n227_pnp_set_irq(device_t dev, u8 irq)
216 u8 irq_config_register = 0, irq_config_mask = 0;
217 u8 current_config, new_config;
219 switch (dev->path.pnp.device) {
221 irq_config_register = 0x27;
222 irq_config_mask = 0x0F;
225 irq_config_register = 0x28;
226 irq_config_mask = 0xF0;
230 irq_config_register = 0x28;
231 irq_config_mask = 0x0F;
240 current_config = pnp_read_config(dev, irq_config_register);
241 new_config = (current_config & ~irq_config_mask) | irq;
242 pnp_write_config(dev, irq_config_register, new_config);
245 void lpc47n227_pnp_set_enable(device_t dev, int enable)
247 u8 power_register = 0, power_mask = 0, current_power, new_power;
249 switch (dev->path.pnp.device) {
251 power_register = 0x01;
255 power_register = 0x02;
259 power_register = 0x02;
269 current_power = pnp_read_config(dev, power_register);
270 new_power = current_power & ~power_mask; /* Disable by default. */
272 struct resource *ioport_resource;
273 ioport_resource = find_resource(dev, PNP_IDX_IO0);
274 lpc47n227_pnp_set_iobase(dev, ioport_resource->base);
275 new_power |= power_mask; /* Enable. */
277 lpc47n227_pnp_set_iobase(dev, 0);
279 pnp_write_config(dev, power_register, new_power);
282 static void pnp_enter_conf_state(device_t dev)
284 outb(0x55, dev->path.pnp.port);
287 static void pnp_exit_conf_state(device_t dev)
289 outb(0xaa, dev->path.pnp.port);