src/superio/smsc/lpc47n227/superio.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2005 Digital Design Corporation
   5  * Copyright (C) 2008-2009 coresystems GmbH
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20
  21 /* RAM-based driver for SMSC LPC47N227 Super I/O chip. */
  22
  23 #include <arch/io.h>
  24 #include <device/device.h>
  25 #include <device/pnp.h>
  26 #include <console/console.h>
  27 #include <device/smbus.h>
  28 #include <string.h>
  29 #include <bitops.h>
  30 #include <uart8250.h>
  31 #include <assert.h>
  32 #include <stdlib.h>
  33 #include "chip.h"
  34 #include "lpc47n227.h"
  35
  36 /* Forward declarations. */
  37 static void enable_dev(device_t dev);
  38 void lpc47n227_pnp_set_resources(device_t dev);
  39 void lpc47n227_pnp_enable_resources(device_t dev);
  40 void lpc47n227_pnp_enable(device_t dev);
  41 static void lpc47n227_init(device_t dev);
  42 static void lpc47n227_pnp_set_resource(device_t dev, struct resource *resource);
  43 void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase);
  44 void lpc47n227_pnp_set_drq(device_t dev, u8 drq);
  45 void lpc47n227_pnp_set_irq(device_t dev, u8 irq);
  46 void lpc47n227_pnp_set_enable(device_t dev, int enable);
  47 static void pnp_enter_conf_state(device_t dev);
  48 static void pnp_exit_conf_state(device_t dev);
  49
  50 struct chip_operations superio_smsc_lpc47n227_ops = {
  51         CHIP_NAME("SMSC LPC47N227 Super I/O")
  52         .enable_dev = enable_dev,
  53 };
  54
  55 static struct device_operations ops = {
  56         .read_resources   = pnp_read_resources,
  57         .set_resources    = lpc47n227_pnp_set_resources,
  58         .enable_resources = lpc47n227_pnp_enable_resources,
  59         .enable           = lpc47n227_pnp_enable,
  60         .init             = lpc47n227_init,
  61 };
  62
  63 static struct pnp_info pnp_dev_info[] = {
  64         { &ops, LPC47N227_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
  65         { &ops, LPC47N227_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
  66         { &ops, LPC47N227_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
  67         { &ops, LPC47N227_KBDC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
  68 };
  69
  70 /**
  71  * Create device structures and allocate resources to devices specified in the
  72  * pnp_dev_info array (above).
  73  *
  74  * @param dev Pointer to structure describing a Super I/O device.
  75  */
  76 static void enable_dev(device_t dev)
  77 {
  78         pnp_enable_devices(dev, &pnp_ops,
  79                            ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
  80 }
  81
  82 /**
  83  * Configure the specified Super I/O device with the resources (I/O space,
  84  * etc.) that have been allocate for it.
  85  *
  86  * NOTE: Cannot use pnp_set_resources() here because it assumes chip
  87  * support for logical devices, which the LPC47N227 doesn't have.
  88  *
  89  * @param dev Pointer to structure describing a Super I/O device.
  90  */
  91 void lpc47n227_pnp_set_resources(device_t dev)
  92 {
  93         struct resource *res;
  94
  95         pnp_enter_conf_state(dev);
  96         for (res = dev->resource_list; res; res = res->next)
  97                 lpc47n227_pnp_set_resource(dev, res);
  98         pnp_exit_conf_state(dev);
  99 }
 100
 101 /*
 102  * NOTE: Cannot use pnp_enable_resources() here because it assumes chip
 103  * support for logical devices, which the LPC47N227 doesn't have.
 104  */
 105 void lpc47n227_pnp_enable_resources(device_t dev)
 106 {
 107         pnp_enter_conf_state(dev);
 108         lpc47n227_pnp_set_enable(dev, 1);
 109         pnp_exit_conf_state(dev);
 110 }
 111
 112 /*
 113  * NOTE: Cannot use pnp_set_enable() here because it assumes chip
 114  * support for logical devices, which the LPC47N227 doesn't have.
 115  */
 116 void lpc47n227_pnp_enable(device_t dev)
 117 {
 118         pnp_enter_conf_state(dev);
 119         lpc47n227_pnp_set_enable(dev, (dev->enabled) ? 1 : 0);
 120         pnp_exit_conf_state(dev);
 121 }
 122
 123 /**
 124  * Initialize the specified Super I/O device.
 125  *
 126  * Devices other than COM ports and keyboard controller are ignored.
 127  * For COM ports, we configure the baud rate.
 128  *
 129  * @param dev Pointer to structure describing a Super I/O device.
 130  */
 131 static void lpc47n227_init(device_t dev)
 132 {
 133         struct superio_smsc_lpc47n227_config *conf = dev->chip_info;
 134         struct resource *res0;
 135
 136         if (!dev->enabled)
 137                 return;
 138
 139         switch (dev->path.pnp.device) {
 140         case LPC47N227_SP1:
 141                 res0 = find_resource(dev, PNP_IDX_IO0);
 142                 init_uart8250(res0->base, &conf->com1);
 143                 break;
 144         case LPC47N227_SP2:
 145                 res0 = find_resource(dev, PNP_IDX_IO0);
 146                 init_uart8250(res0->base, &conf->com2);
 147                 break;
 148         case LPC47N227_KBDC:
 149                 printk(BIOS_DEBUG, "LPC47N227: Initializing keyboard.\n");
 150                 pc_keyboard_init(&conf->keyboard);
 151                 break;
 152         }
 153 }
 154
 155 static void lpc47n227_pnp_set_resource(device_t dev, struct resource *resource)
 156 {
 157         if (!(resource->flags & IORESOURCE_ASSIGNED)) {
 158                 printk(BIOS_ERR, "ERROR: %s %02lx not allocated\n",
 159                        dev_path(dev), resource->index);
 160                 return;
 161         }
 162
 163         /* Now store the resource. */
 164         /*
 165          * NOTE: Cannot use pnp_set_XXX() here because they assume chip
 166          * support for logical devices, which the LPC47N227 doesn't have.
 167          */
 168         if (resource->flags & IORESOURCE_IO) {
 169                 lpc47n227_pnp_set_iobase(dev, resource->base);
 170         } else if (resource->flags & IORESOURCE_DRQ) {
 171                 lpc47n227_pnp_set_drq(dev, resource->base);
 172         } else if (resource->flags & IORESOURCE_IRQ) {
 173                 lpc47n227_pnp_set_irq(dev, resource->base);
 174         } else {
 175                 printk(BIOS_ERR, "ERROR: %s %02lx unknown resource type\n",
 176                        dev_path(dev), resource->index);
 177                 return;
 178         }
 179         resource->flags |= IORESOURCE_STORED;
 180
 181         report_resource_stored(dev, resource, "");
 182 }
 183
 184 void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase)
 185 {
 186         ASSERT(!(iobase & 0x3));
 187
 188         switch (dev->path.pnp.device) {
 189         case LPC47N227_PP:
 190                 pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
 191                 break;
 192         case LPC47N227_SP1:
 193                 pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
 194                 break;
 195         case LPC47N227_SP2:
 196                 pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
 197                 break;
 198         case LPC47N227_KBDC:
 199                 break;
 200         default:
 201                 BUG();
 202                 break;
 203         }
 204 }
 205
 206 void lpc47n227_pnp_set_drq(device_t dev, u8 drq)
 207 {
 208         const u8 PP_DMA_MASK = 0x0F;
 209         const u8 PP_DMA_SELECTION_REGISTER = 0x26;
 210         u8 current_config, new_config;
 211
 212         if (dev->path.pnp.device == LPC47N227_PP) {
 213                 current_config = pnp_read_config(dev,
 214                                                  PP_DMA_SELECTION_REGISTER);
 215                 ASSERT(!(drq & ~PP_DMA_MASK));  // DRQ out of range??
 216                 new_config = (current_config & ~PP_DMA_MASK) | drq;
 217                 pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config);
 218         } else {
 219                 BUG();
 220         }
 221 }
 222
 223 void lpc47n227_pnp_set_irq(device_t dev, u8 irq)
 224 {
 225         u8 irq_config_register = 0, irq_config_mask = 0;
 226         u8 current_config, new_config;
 227
 228         switch (dev->path.pnp.device) {
 229         case LPC47N227_PP:
 230                 irq_config_register = 0x27;
 231                 irq_config_mask = 0x0F;
 232                 break;
 233         case LPC47N227_SP1:
 234                 irq_config_register = 0x28;
 235                 irq_config_mask = 0xF0;
 236                 irq <<= 4;
 237                 break;
 238         case LPC47N227_SP2:
 239                 irq_config_register = 0x28;
 240                 irq_config_mask = 0x0F;
 241                 break;
 242         case LPC47N227_KBDC:
 243                 break;
 244         default:
 245                 BUG();
 246                 return;
 247         }
 248
 249         current_config = pnp_read_config(dev, irq_config_register);
 250         new_config = (current_config & ~irq_config_mask) | irq;
 251         pnp_write_config(dev, irq_config_register, new_config);
 252 }
 253
 254 void lpc47n227_pnp_set_enable(device_t dev, int enable)
 255 {
 256         u8 power_register = 0, power_mask = 0, current_power, new_power;
 257
 258         switch (dev->path.pnp.device) {
 259         case LPC47N227_PP:
 260                 power_register = 0x01;
 261                 power_mask = 0x04;
 262                 break;
 263         case LPC47N227_SP1:
 264                 power_register = 0x02;
 265                 power_mask = 0x08;
 266                 break;
 267         case LPC47N227_SP2:
 268                 power_register = 0x02;
 269                 power_mask = 0x80;
 270                 break;
 271         case LPC47N227_KBDC:
 272                 break;
 273         default:
 274                 BUG();
 275                 return;
 276         }
 277
 278         current_power = pnp_read_config(dev, power_register);
 279         new_power = current_power & ~power_mask; /* Disable by default. */
 280         if (enable) {
 281                 struct resource *ioport_resource;
 282                 ioport_resource = find_resource(dev, PNP_IDX_IO0);
 283                 lpc47n227_pnp_set_iobase(dev, ioport_resource->base);
 284                 new_power |= power_mask; /* Enable. */
 285         } else {
 286                 lpc47n227_pnp_set_iobase(dev, 0);
 287         }
 288         pnp_write_config(dev, power_register, new_power);
 289 }
 290
 291 static void pnp_enter_conf_state(device_t dev)
 292 {
 293         outb(0x55, dev->path.pnp.port);
 294 }
 295
 296 static void pnp_exit_conf_state(device_t dev)
 297 {
 298         outb(0xaa, dev->path.pnp.port);
 299 }