src/superio/smsc/lpc47n217/superio.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2000 AG Electronics Ltd.
   5  * Copyright (C) 2003-2004 Linux Networx
   6  * Copyright (C) 2004 Tyan
   7  * Copyright (C) 2005 Digital Design Corporation
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  22  */
  23
  24 /* RAM-based driver for SMSC LPC47N217 Super I/O chip. */
  25 /* Based on coreboot code for SMSC 47B397. */
  26
  27 #include <arch/io.h>
  28 #include <device/device.h>
  29 #include <device/pnp.h>
  30 #include <console/console.h>
  31 #include <device/smbus.h>
  32 #include <string.h>
  33 #include <bitops.h>
  34 #include <uart8250.h>
  35 #include <assert.h>
  36 #include <stdlib.h>
  37 #include "chip.h"
  38 #include "lpc47n217.h"
  39
  40 /* Forward declarations */
  41 static void enable_dev(device_t dev);
  42 static void lpc47n217_pnp_set_resources(device_t dev);
  43 static void lpc47n217_pnp_enable_resources(device_t dev);
  44 static void lpc47n217_pnp_enable(device_t dev);
  45 static void lpc47n217_init(device_t dev);
  46
  47 static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource);
  48 static void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase);
  49 static void lpc47n217_pnp_set_drq(device_t dev, unsigned drq);
  50 static void lpc47n217_pnp_set_irq(device_t dev, unsigned irq);
  51 static void lpc47n217_pnp_set_enable(device_t dev, int enable);
  52
  53 static void pnp_enter_conf_state(device_t dev);
  54 static void pnp_exit_conf_state(device_t dev);
  55
  56 struct chip_operations superio_smsc_lpc47n217_ops = {
  57         CHIP_NAME("SMSC LPC47N217 Super I/O")
  58         .enable_dev = enable_dev,
  59 };
  60
  61 static struct device_operations ops = {
  62         .read_resources   = pnp_read_resources,
  63         .set_resources    = lpc47n217_pnp_set_resources,
  64         .enable_resources = lpc47n217_pnp_enable_resources,
  65         .enable           = lpc47n217_pnp_enable,
  66         .init             = lpc47n217_init,
  67 };
  68
  69 static struct pnp_info pnp_dev_info[] = {
  70         { &ops, LPC47N217_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
  71         { &ops, LPC47N217_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
  72         { &ops, LPC47N217_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }
  73 };
  74
  75 /**********************************************************************************/
  76 /*                      PUBLIC INTERFACE                                          */
  77 /**********************************************************************************/
  78
  79 /*
  80  * Function:            enable_dev
  81  * Parameters:          dev - pointer to structure describing a Super I/O device
  82  * Return Value:        None
  83  * Description:         Create device structures and allocate resources to devices
  84  *                      specified in the pnp_dev_info array (above).
  85  */
  86 static void enable_dev(device_t dev)
  87 {
  88         pnp_enable_devices(dev, &pnp_ops,
  89                            ARRAY_SIZE(pnp_dev_info),
  90                            pnp_dev_info);
  91 }
  92
  93 /*
  94  * Function:            lpc47n217_pnp_set_resources
  95  * Parameters:          dev - pointer to structure describing a Super I/O device
  96  * Return Value:        None
  97  * Description:         Configure the specified Super I/O device with the resources
  98  *                      (I/O space, etc.) that have been allocate for it.
  99  */
 100 static void lpc47n217_pnp_set_resources(device_t dev)
 101 {
 102         struct resource *res;
 103
 104         pnp_enter_conf_state(dev);
 105
 106         /* NOTE: Cannot use pnp_set_resources() here because it assumes chip
 107          * support for logical devices, which the LPC47N217 doesn't have
 108          */
 109         for(res = dev->resource_list; res; res = res->next)
 110                 lpc47n217_pnp_set_resource(dev, res);
 111
 112         /* dump_pnp_device(dev); */
 113
 114         pnp_exit_conf_state(dev);
 115 }
 116
 117 static void lpc47n217_pnp_enable_resources(device_t dev)
 118 {
 119         pnp_enter_conf_state(dev);
 120
 121         /* NOTE: Cannot use pnp_enable_resources() here because it assumes chip
 122          * support for logical devices, which the LPC47N217 doesn't have
 123          */
 124         lpc47n217_pnp_set_enable(dev, 1);
 125
 126         pnp_exit_conf_state(dev);
 127 }
 128
 129 static void lpc47n217_pnp_enable(device_t dev)
 130 {
 131         pnp_enter_conf_state(dev);
 132
 133         /* NOTE: Cannot use pnp_set_enable() here because it assumes chip
 134          * support for logical devices, which the LPC47N217 doesn't have
 135          */
 136
 137         if(dev->enabled) {
 138                 lpc47n217_pnp_set_enable(dev, 1);
 139         }
 140         else {
 141                 lpc47n217_pnp_set_enable(dev, 0);
 142         }
 143
 144         pnp_exit_conf_state(dev);
 145 }
 146
 147 /*
 148  * Function:            lpc47n217_init
 149  * Parameters:          dev - pointer to structure describing a Super I/O device
 150  * Return Value:        None
 151  * Description:         Initialize the specified Super I/O device.
 152  *                      Devices other than COM ports are ignored.
 153  *                      For COM ports, we configure the baud rate.
 154  */
 155 static void lpc47n217_init(device_t dev)
 156 {
 157         struct superio_smsc_lpc47n217_config* conf = dev->chip_info;
 158         struct resource *res0;
 159
 160         if (!dev->enabled)
 161                 return;
 162
 163         switch(dev->path.pnp.device) {
 164         case LPC47N217_SP1:
 165                 res0 = find_resource(dev, PNP_IDX_IO0);
 166                 init_uart8250(res0->base, &conf->com1);
 167                 break;
 168
 169         case LPC47N217_SP2:
 170                 res0 = find_resource(dev, PNP_IDX_IO0);
 171                 init_uart8250(res0->base, &conf->com2);
 172                 break;
 173         }
 174 }
 175
 176 /**********************************************************************************/
 177 /*                              PRIVATE FUNCTIONS                                 */
 178 /**********************************************************************************/
 179
 180 static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource)
 181 {
 182         if (!(resource->flags & IORESOURCE_ASSIGNED)) {
 183                 printk(BIOS_ERR, "ERROR: %s %02x not allocated\n",
 184                         dev_path(dev), resource->index);
 185                 return;
 186         }
 187
 188         /* Now store the resource */
 189         /* NOTE: Cannot use pnp_set_XXX() here because they assume chip
 190          * support for logical devices, which the LPC47N217 doesn't have
 191          */
 192
 193         if (resource->flags & IORESOURCE_IO) {
 194                 lpc47n217_pnp_set_iobase(dev, resource->base);
 195         }
 196         else if (resource->flags & IORESOURCE_DRQ) {
 197                 lpc47n217_pnp_set_drq(dev, resource->base);
 198         }
 199         else if (resource->flags  & IORESOURCE_IRQ) {
 200                 lpc47n217_pnp_set_irq(dev, resource->base);
 201         }
 202         else {
 203                 printk(BIOS_ERR, "ERROR: %s %02x unknown resource type\n",
 204                         dev_path(dev), resource->index);
 205                 return;
 206         }
 207         resource->flags |= IORESOURCE_STORED;
 208
 209         report_resource_stored(dev, resource, "");
 210 }
 211
 212 static void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase)
 213 {
 214         ASSERT(!(iobase & 0x3));
 215
 216         switch(dev->path.pnp.device) {
 217         case LPC47N217_PP:
 218                 pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
 219                 break;
 220
 221         case LPC47N217_SP1:
 222                 pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
 223                 break;
 224
 225         case LPC47N217_SP2:
 226                 pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
 227                 break;
 228
 229         default:
 230                 BUG();
 231                 break;
 232         }
 233 }
 234
 235 static void lpc47n217_pnp_set_drq(device_t dev, unsigned drq)
 236 {
 237         if (dev->path.pnp.device == LPC47N217_PP) {
 238                 const uint8_t PP_DMA_MASK = 0x0F;
 239                 const uint8_t PP_DMA_SELECTION_REGISTER = 0x26;
 240                 uint8_t current_config = pnp_read_config(dev, PP_DMA_SELECTION_REGISTER);
 241                 uint8_t new_config;
 242
 243                 ASSERT(!(drq & ~PP_DMA_MASK));          /* DRQ out of range?? */
 244                 new_config = (current_config & ~PP_DMA_MASK) | drq;
 245                 pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config);
 246         } else {
 247                 BUG();
 248         }
 249 }
 250
 251 static void lpc47n217_pnp_set_irq(device_t dev, unsigned irq)
 252 {
 253         uint8_t irq_config_register = 0;
 254         uint8_t irq_config_mask = 0;
 255         uint8_t current_config;
 256         uint8_t new_config;
 257
 258         switch(dev->path.pnp.device) {
 259         case LPC47N217_PP:
 260                 irq_config_register = 0x27;
 261                 irq_config_mask = 0x0F;
 262                 break;
 263
 264         case LPC47N217_SP1:
 265                 irq_config_register = 0x28;
 266                 irq_config_mask = 0xF0;
 267                 irq <<= 4;
 268                 break;
 269
 270         case LPC47N217_SP2:
 271                 irq_config_register = 0x28;
 272                 irq_config_mask = 0x0F;
 273                 break;
 274
 275         default:
 276                 BUG();
 277                 return;
 278         }
 279
 280         ASSERT(!(irq & ~irq_config_mask));              /* IRQ out of range?? */
 281
 282         current_config = pnp_read_config(dev, irq_config_register);
 283         new_config = (current_config & ~irq_config_mask) | irq;
 284         pnp_write_config(dev, irq_config_register, new_config);
 285 }
 286
 287 static void lpc47n217_pnp_set_enable(device_t dev, int enable)
 288 {
 289         uint8_t power_register = 0;
 290         uint8_t power_mask = 0;
 291         uint8_t current_power;
 292         uint8_t new_power;
 293
 294         switch(dev->path.pnp.device) {
 295         case LPC47N217_PP:
 296                 power_register = 0x01;
 297                 power_mask = 0x04;
 298                 break;
 299
 300         case LPC47N217_SP1:
 301                 power_register = 0x02;
 302                 power_mask = 0x08;
 303                 break;
 304
 305         case LPC47N217_SP2:
 306                 power_register = 0x02;
 307                 power_mask = 0x80;
 308                 break;
 309
 310         default:
 311                 BUG();
 312                 return;
 313         }
 314
 315         current_power = pnp_read_config(dev, power_register);
 316         new_power = current_power & ~power_mask;                /* disable by default */
 317
 318         if (enable) {
 319                 struct resource* ioport_resource = find_resource(dev, PNP_IDX_IO0);
 320                 lpc47n217_pnp_set_iobase(dev, ioport_resource->base);
 321
 322                 new_power |= power_mask;                /* Enable */
 323
 324         } else {
 325                 lpc47n217_pnp_set_iobase(dev, 0);
 326         }
 327         pnp_write_config(dev, power_register, new_power);
 328 }
 329
 330 /*
 331  * Function:            pnp_enter_conf_state
 332  * Parameters:          dev - pointer to structure describing a Super I/O device
 333  * Return Value:        None
 334  * Description:         Enable access to the LPC47N217's configuration registers.
 335  */
 336 static void pnp_enter_conf_state(device_t dev)
 337 {
 338         outb(0x55, dev->path.pnp.port);
 339 }
 340
 341 /*
 342  * Function:            pnp_exit_conf_state
 343  * Parameters:          dev - pointer to structure describing a Super I/O device
 344  * Return Value:        None
 345  * Description:         Disable access to the LPC47N217's configuration registers.
 346  */
 347 static void pnp_exit_conf_state(device_t dev)
 348 {
 349         outb(0xaa, dev->path.pnp.port);
 350 }
 351
 352 #if 0
 353 /*
 354  * Function:            dump_pnp_device
 355  * Parameters:          dev - pointer to structure describing a Super I/O device
 356  * Return Value:        None
 357  * Description:         Print the values of all of the LPC47N217's configuration registers.
 358  *                      NOTE: The LPC47N217 must be in configuration mode when this
 359  *                      function is called.
 360  */
 361 static void dump_pnp_device(device_t dev)
 362 {
 363         int register_index;
 364         print_debug("\n");
 365
 366         for(register_index = 0; register_index <= LPC47N217_MAX_CONFIG_REGISTER; register_index++) {
 367                 uint8_t register_value;
 368
 369                 if ((register_index & 0x0f) == 0) {
 370                         print_debug_hex8(register_index);
 371                         print_debug_char(':');
 372                 }
 373
 374                 /* Skip over 'register' that would cause exit from configuration mode */
 375                 if (register_index == 0xaa)
 376                         register_value = 0xaa;
 377                 else
 378                         register_value = pnp_read_config(dev, register_index);
 379
 380                 print_debug_char(' ');
 381                 print_debug_hex8(register_value);
 382                 if ((register_index & 0x0f) == 0x0f) {
 383                         print_debug("\n");
 384                 }
 385         }
 386
 387         print_debug("\n");
 388 }
 389 #endif