src/superio/smsc/lpc47n217/lpc47n217_early_serial.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2005 Digital Design Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20
  21 /* Pre-RAM driver for SMSC LPC47N217 Super I/O chip. */
  22
  23 #include <arch/romcc_io.h>
  24 #include <assert.h>
  25 #include "lpc47n217.h"
  26
  27 //----------------------------------------------------------------------------------
  28 // Function:            pnp_enter_conf_state
  29 // Parameters:          dev - high 8 bits = Super I/O port
  30 // Return Value:        None
  31 // Description:         Enable access to the LPC47N217's configuration registers.
  32 //
  33 static inline void pnp_enter_conf_state(device_t dev) {
  34         unsigned port = dev>>8;
  35     outb(0x55, port);
  36 }
  37
  38 //----------------------------------------------------------------------------------
  39 // Function:            pnp_exit_conf_state
  40 // Parameters:          dev - high 8 bits = Super I/O port
  41 // Return Value:        None
  42 // Description:         Disable access to the LPC47N217's configuration registers.
  43 //
  44 static void pnp_exit_conf_state(device_t dev) {
  45         unsigned port = dev>>8;
  46     outb(0xaa, port);
  47 }
  48
  49 //----------------------------------------------------------------------------------
  50 // Function:            lpc47n217_pnp_set_iobase
  51 // Parameters:          dev - high 8 bits = Super I/O port,
  52 //                                                low 8 bits = logical device number (per lpc47n217.h)
  53 //                                      iobase - base I/O port for the logical device
  54 // Return Value:        None
  55 // Description:         Program the base I/O port for the specified logical device.
  56 //
  57 void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase)
  58 {
  59         // LPC47N217 requires base ports to be a multiple of 4
  60         ASSERT(!(iobase & 0x3));
  61
  62         switch(dev & 0xFF) {
  63         case LPC47N217_PP:
  64                 pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
  65                 break;
  66
  67         case LPC47N217_SP1:
  68                 pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
  69                 break;
  70
  71         case LPC47N217_SP2:
  72                 pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
  73                 break;
  74
  75         default:
  76                 break;
  77         }
  78 }
  79
  80 //----------------------------------------------------------------------------------
  81 // Function:            lpc47n217_pnp_set_enable
  82 // Parameters:          dev - high 8 bits = Super I/O port,
  83 //                                                low 8 bits = logical device number (per lpc47n217.h)
  84 //                                      enable - 0 to disable, anythig else to enable
  85 // Return Value:        None
  86 // Description:         Enable or disable the specified logical device.
  87 //                                      Technically, a full disable requires setting the device's base
  88 //                                      I/O port below 0x100. We don't do that here, because we don't
  89 //                                      have access to a data structure that specifies what the 'real'
  90 //                                      base port is (when asked to enable the device). Also the function
  91 //                                      is used only to disable the device while its true base port is
  92 //                                      programmed (see lpc47n217_enable_serial() below).
  93 //
  94 void lpc47n217_pnp_set_enable(device_t dev, int enable)
  95 {
  96         uint8_t power_register = 0;
  97         uint8_t power_mask = 0;
  98         uint8_t current_power;
  99         uint8_t new_power;
 100
 101         switch(dev & 0xFF) {
 102         case LPC47N217_PP:
 103                 power_register = 0x01;
 104                 power_mask = 0x04;
 105                 break;
 106
 107         case LPC47N217_SP1:
 108                 power_register = 0x02;
 109                 power_mask = 0x08;
 110                 break;
 111
 112         case LPC47N217_SP2:
 113                 power_register = 0x02;
 114                 power_mask = 0x80;
 115                 break;
 116
 117         default:
 118                 return;
 119         }
 120
 121         current_power = pnp_read_config(dev, power_register);
 122         new_power = current_power & ~power_mask;                // disable by default
 123
 124         if (enable)
 125                 new_power |= power_mask;                // Enable
 126
 127         pnp_write_config(dev, power_register, new_power);
 128 }
 129
 130 //----------------------------------------------------------------------------------
 131 // Function:            lpc47n217_enable_serial
 132 // Parameters:          dev - high 8 bits = Super I/O port,
 133 //                                                low 8 bits = logical device number (per lpc47n217.h)
 134 //                                      iobase - processor I/O port address to assign to this serial device
 135 // Return Value:        bool
 136 // Description:         Configure the base I/O port of the specified serial device
 137 //                                      and enable the serial device.
 138 //
 139 static void lpc47n217_enable_serial(device_t dev, unsigned iobase)
 140 {
 141         // NOTE: Cannot use pnp_set_XXX() here because they assume chip
 142         //               support for logical devices, which the LPC47N217 doesn't have
 143
 144         pnp_enter_conf_state(dev);
 145         lpc47n217_pnp_set_enable(dev, 0);
 146         lpc47n217_pnp_set_iobase(dev, iobase);
 147         lpc47n217_pnp_set_enable(dev, 1);
 148         pnp_exit_conf_state(dev);
 149 }