2 * This file is part of the coreboot project.
4 * Copyright (C) 2000 AG Electronics Ltd.
5 * Copyright (C) 2003-2004 Linux Networx
6 * Copyright (C) 2004 Tyan
7 * Copyright (C) 2005 Digital Design Corporation
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 /* RAM driver for SMSC LPC47B272 Super I/O chip. */
27 #include <device/device.h>
28 #include <device/pnp.h>
29 #include <console/console.h>
30 #include <device/smbus.h>
34 #include <pc80/keyboard.h>
37 #include "lpc47b272.h"
39 /* Forward declarations */
40 static void enable_dev(device_t dev);
41 static void lpc47b272_pnp_set_resources(device_t dev);
42 static void lpc47b272_pnp_enable_resources(device_t dev);
43 static void lpc47b272_pnp_enable(device_t dev);
44 static void lpc47b272_init(device_t dev);
46 static void pnp_enter_conf_state(device_t dev);
47 static void pnp_exit_conf_state(device_t dev);
48 //static void dump_pnp_device(device_t dev);
50 struct chip_operations superio_smsc_lpc47b272_ops = {
51 CHIP_NAME("SMSC LPC47B272 Super I/O")
52 .enable_dev = enable_dev
55 static struct device_operations ops = {
56 .read_resources = pnp_read_resources,
57 .set_resources = lpc47b272_pnp_set_resources,
58 .enable_resources = lpc47b272_pnp_enable_resources,
59 .enable = lpc47b272_pnp_enable,
60 .init = lpc47b272_init,
63 static struct pnp_info pnp_dev_info[] = {
64 { &ops, LPC47B272_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
65 { &ops, LPC47B272_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
66 { &ops, LPC47B272_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
67 { &ops, LPC47B272_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
68 { &ops, LPC47B272_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
69 { &ops, LPC47B272_RT, PNP_IO0, { 0x780, 0 }, },
73 * Create device structures and allocate resources to devices specified in the
74 * pnp_dev_info array (above).
76 * @param dev Pointer to structure describing a Super I/O device.
78 static void enable_dev(device_t dev)
80 pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info),
85 * Configure the specified Super I/O device with the resources (I/O space,
86 * etc.) that have been allocated for it.
88 * @param dev Pointer to structure describing a Super I/O device.
90 static void lpc47b272_pnp_set_resources(device_t dev)
92 pnp_enter_conf_state(dev);
93 pnp_set_resources(dev);
94 pnp_exit_conf_state(dev);
97 static void lpc47b272_pnp_enable_resources(device_t dev)
99 pnp_enter_conf_state(dev);
100 pnp_enable_resources(dev);
101 pnp_exit_conf_state(dev);
104 static void lpc47b272_pnp_enable(device_t dev)
106 pnp_enter_conf_state(dev);
107 pnp_set_logical_device(dev);
110 pnp_set_enable(dev, 1);
113 pnp_set_enable(dev, 0);
115 pnp_exit_conf_state(dev);
119 * Initialize the specified Super I/O device.
121 * Devices other than COM ports and the keyboard controller are ignored.
122 * For COM ports, we configure the baud rate.
124 * @param dev Pointer to structure describing a Super I/O device.
126 static void lpc47b272_init(device_t dev)
128 struct superio_smsc_lpc47b272_config *conf = dev->chip_info;
129 struct resource *res0, *res1;
134 switch(dev->path.pnp.device) {
136 res0 = find_resource(dev, PNP_IDX_IO0);
137 init_uart8250(res0->base, &conf->com1);
141 res0 = find_resource(dev, PNP_IDX_IO0);
142 init_uart8250(res0->base, &conf->com2);
146 res0 = find_resource(dev, PNP_IDX_IO0);
147 res1 = find_resource(dev, PNP_IDX_IO1);
148 pc_keyboard_init(&conf->keyboard);
153 /** Enable access to the LPC47B272's configuration registers. */
154 static void pnp_enter_conf_state(device_t dev)
156 outb(0x55, dev->path.pnp.port);
159 /** Disable access to the LPC47B272's configuration registers. */
160 static void pnp_exit_conf_state(device_t dev)
162 outb(0xaa, dev->path.pnp.port);
167 * Print the values of all of the LPC47B272's configuration registers.
169 * NOTE: The LPC47B272 must be in config mode when this function is called.
171 * @param dev Pointer to structure describing a Super I/O device.
173 static void dump_pnp_device(device_t dev)
178 for(register_index = 0; register_index <= LPC47B272_MAX_CONFIG_REGISTER; register_index++) {
179 uint8_t register_value;
181 if ((register_index & 0x0f) == 0) {
182 print_debug_hex8(register_index);
183 print_debug_char(':');
186 /* Skip over 'register' that would cause exit from configuration mode */
187 if (register_index == 0xaa)
188 register_value = 0xaa;
190 register_value = pnp_read_config(dev, register_index);
192 print_debug_char(' ');
193 print_debug_hex8(register_value);
194 if ((register_index & 0x0f) == 0x0f) {