Various Super I/O fixes and corrections.
[coreboot.git] / src / superio / serverengines / pilot / pilot_early_init.c
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2009 University of Heidelberg
5  * Written by Mondrian Nuessle <nuessle@uni-heidelberg.de> for Univ. Heidelberg
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
20  */
21
22 /* PILOT Super I/O is only based on LPC observation done on factory system. */
23
24 #define BLUBB_DEV PNP_DEV(port, 0x04)
25
26 /*
27  * Logical device 4, 5 and 7 are being deactivated. Logical Device 1 seems to
28  * be another serial (?), it is also deactivated on the HP machine.
29  */
30 static void pilot_early_init(device_t dev)
31 {
32         u16 port = dev >> 8;
33
34         print_debug("Using port: ");
35         print_debug_hex16(port);
36         print_debug("\n");
37         pilot_disable_serial(PNP_DEV(port, 0x1));
38         print_debug("disable serial 1\n");
39
40         pnp_enter_ext_func_mode(dev);
41         pnp_set_logical_device(PNP_DEV(port, 0x3));
42         pnp_set_enable(dev, 0);
43         pnp_set_iobase(dev, 0x60, 0x0b00);
44         pnp_set_iobase(dev, 0x62, 0x0b80);
45         pnp_set_iobase(dev, 0x64, 0x0b84);
46         pnp_set_iobase(dev, 0x66, 0x0b86);
47         pnp_set_enable(dev, 1);
48         pnp_exit_ext_func_mode(dev);
49
50 /*
51         pnp_enter_ext_func_mode(dev);
52         pnp_set_logical_device(PNP_DEV(port, 0x3));
53         pnp_exit_ext_func_mode(dev);
54         pnp_enter_ext_func_mode(dev);
55         pnp_set_enable(PNP_DEV(port, 0x3), 0);
56         pnp_exit_ext_func_mode(dev);
57 */
58
59         pnp_enter_ext_func_mode(dev);
60         pnp_set_logical_device(PNP_DEV(port, 0x4));
61         pnp_exit_ext_func_mode(dev);
62         pnp_enter_ext_func_mode(dev);
63         pnp_set_enable( PNP_DEV(port, 0x4), 0);
64         pnp_exit_ext_func_mode(dev);
65
66         pnp_enter_ext_func_mode(dev);
67         pnp_set_logical_device(PNP_DEV(port, 0x5));
68         pnp_exit_ext_func_mode(dev);
69         pnp_enter_ext_func_mode(dev);
70         pnp_set_enable(PNP_DEV(port, 0x5), 0);
71         pnp_exit_ext_func_mode(dev);
72
73         pnp_enter_ext_func_mode(dev);
74         pnp_set_logical_device(PNP_DEV(port, 0x6));
75         pnp_set_enable(dev, 0);
76         pnp_set_iobase(dev, PNP_IDX_IO0, 0x60);
77         pnp_set_iobase(dev, PNP_IDX_IO1, 0x64);
78         pnp_set_irq(dev, PNP_IDX_IRQ0, 1);
79         pnp_set_drq(dev, 0x71, 3);
80         pnp_set_enable(dev, 0);
81         pnp_exit_ext_func_mode(dev);
82
83         pnp_enter_ext_func_mode(dev);
84         pnp_set_logical_device(PNP_DEV(port, 0xe));
85         pnp_set_enable(dev, 0);
86         pnp_set_iobase(dev, PNP_IDX_IO0, 0x70);
87         pnp_set_iobase(dev, PNP_IDX_IO1, 0x72);
88         pnp_set_irq(dev, PNP_IDX_IRQ0, 8);
89         pnp_set_drq(dev, 0x71, 3);
90         pnp_set_enable(dev, 0);
91         pnp_exit_ext_func_mode(dev);
92
93         pnp_enter_ext_func_mode(dev);
94         pnp_set_logical_device(PNP_DEV(port, 0x7));
95         pnp_exit_ext_func_mode(dev);
96         pnp_enter_ext_func_mode(dev);
97         pnp_set_enable(PNP_DEV(port, 0x7), 0);
98         pnp_exit_ext_func_mode(dev);
99
100 /*
101         pnp_enter_ext_func_mode(dev);
102         pnp_set_logical_device(PNP_DEV(port, 0x8));
103         pnp_exit_ext_func_mode(dev);
104         pnp_enter_ext_func_mode(dev);
105         pnp_set_enable(PNP_DEV(port, 0x8), 0);
106         pnp_exit_ext_func_mode(dev);
107
108         pnp_enter_ext_func_mode(dev);
109         pnp_set_logical_device(PNP_DEV(port, 0x9));
110         pnp_exit_ext_func_mode(dev);
111         pnp_enter_ext_func_mode(dev);
112         pnp_set_enable(PNP_DEV(port, 0x9), 0);
113         pnp_exit_ext_func_mode(dev);
114
115         pnp_enter_ext_func_mode(dev);
116         pnp_set_logical_device(PNP_DEV(port, 0x10));
117         pnp_exit_ext_func_mode(dev);
118         pnp_enter_ext_func_mode(dev);
119         pnp_set_enable(PNP_DEV(port, 0x10), 0);
120         pnp_exit_ext_func_mode(dev);
121 */
122 }