2 * This file is part of the coreboot project.
4 * Copyright (C) 2000 AG Electronics Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <console/console.h>
23 #include <device/device.h>
24 #include <device/pnp.h>
29 static void init(device_t dev)
31 struct superio_nsc_pc97307_config *conf = dev->chip_info;
32 struct resource *res0;
38 switch(dev->path.pnp.device) {
40 res0 = find_resource(dev, PNP_IDX_IO0);
41 init_uart8250(res0->base, &conf->com1);
44 res0 = find_resource(dev, PNP_IDX_IO0);
45 init_uart8250(res0->base, &conf->com2);
48 pnp_set_logical_device(dev);
49 pnp_set_enable(dev, 0); /* Disable keyboard */
50 pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */
51 pnp_set_enable(dev, 1); /* Enable keyboard. */
52 pc_keyboard_init(&conf->keyboard);
55 /* Set up floppy in PS/2 mode. */
56 outb(0x09, SIO_CONFIG_RA);
57 reg8 = inb(SIO_CONFIG_RD);
58 reg8 = (reg8 & 0x3F) | 0x40;
59 outb(reg8, SIO_CONFIG_RD);
60 outb(reg8, SIO_CONFIG_RD); /* Have to write twice to change! */
67 static struct device_operations ops = {
68 .read_resources = pnp_read_resources,
69 .set_resources = pnp_set_resources,
70 .enable_resources = pnp_enable_resources,
75 static struct pnp_info pnp_dev_info[] = {
76 { &ops, PC97307_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x0ffb, 0}, {0x0ffb, 4}, },
77 { &ops, PC97307_KBCM, PNP_IRQ0, },
78 { &ops, PC97307_RTC, PNP_IO0 | PNP_IRQ0, {0xfffe, 0}, },
79 { &ops, PC97307_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0xfffa, 0}, },
80 { &ops, PC97307_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x03fc, 0}, },
81 { &ops, PC97307_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0xfff8, 0}, },
82 { &ops, PC97307_SP1, PNP_IO0 | PNP_IRQ0, {0xfff8, 0}, },
83 { &ops, PC97307_GPIO, PNP_IO0, {0xfff8, 0}, },
84 { &ops, PC97307_PM, PNP_IO0, {0xfffe, 0}, },
87 static void enable_dev(struct device *dev)
89 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
92 struct chip_operations superio_nsc_pc97307_ops = {
93 CHIP_NAME("NSC PC97307 Super I/O")
94 .enable_dev = enable_dev,