2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <device/device.h>
23 #include <device/pnp.h>
24 #include <console/console.h>
32 static void init(device_t dev)
34 struct superio_nsc_pc87392_config *conf = dev->chip_info;
35 struct resource *res0;
40 switch(dev->path.pnp.device) {
42 res0 = find_resource(dev, PNP_IDX_IO0);
43 init_uart8250(res0->base, &conf->com1);
47 res0 = find_resource(dev, PNP_IDX_IO0);
48 init_uart8250(res0->base, &conf->com2);
53 static struct device_operations ops = {
54 .read_resources = pnp_read_resources,
55 .set_resources = pnp_set_resources,
56 .enable_resources = pnp_enable_resources,
61 static struct pnp_info pnp_dev_info[] = {
62 { &ops, PC87392_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07fa, 0} },
63 { &ops, PC87392_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x04f8, 0} },
64 { &ops, PC87392_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0} },
65 { &ops, PC87392_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0} },
66 { &ops, PC87392_GPIO, PNP_IO0 | PNP_IRQ0, {0xfff8, 0} },
67 { &ops, PC87392_WDT, PNP_IO0 | PNP_IRQ0, {0xfffc, 0} },
70 static void enable_dev(struct device *dev)
72 pnp_enable_devices(dev, &pnp_ops,
73 ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
76 struct chip_operations superio_nsc_pc87392_ops = {
77 CHIP_NAME("NSC PC87392 Super I/O")
78 .enable_dev = enable_dev,