src/superio/intel/i3100/superio.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008 Arastra, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20
  21 #include <stdlib.h>
  22 #include <device/device.h>
  23 #include <device/pnp.h>
  24 #include <uart8250.h>
  25 #include "chip.h"
  26 #include "i3100.h"
  27 #include <arch/io.h>
  28
  29 static void pnp_enter_ext_func_mode(device_t dev)
  30 {
  31         outb(0x80, dev->path.pnp.port);
  32         outb(0x86, dev->path.pnp.port);
  33 }
  34
  35 static void pnp_exit_ext_func_mode(device_t dev)
  36 {
  37         outb(0x68, dev->path.pnp.port);
  38         outb(0x08, dev->path.pnp.port);
  39 }
  40
  41 static void i3100_init(device_t dev)
  42 {
  43         struct superio_intel_i3100_config *conf;
  44         struct resource *res0;
  45
  46         if (!dev->enabled) {
  47                 return;
  48         }
  49
  50         conf = dev->chip_info;
  51
  52         switch (dev->path.pnp.device) {
  53         case I3100_SP1:
  54                 res0 = find_resource(dev, PNP_IDX_IO0);
  55                 init_uart8250(res0->base, &conf->com1);
  56                 break;
  57         case I3100_SP2:
  58                 res0 = find_resource(dev, PNP_IDX_IO0);
  59                 init_uart8250(res0->base, &conf->com2);
  60                 break;
  61         }
  62 }
  63
  64 static void i3100_pnp_set_resources(device_t dev)
  65 {
  66         pnp_enter_ext_func_mode(dev);
  67         pnp_set_resources(dev);
  68         pnp_exit_ext_func_mode(dev);
  69 }
  70
  71 static void i3100_pnp_enable_resources(device_t dev)
  72 {
  73         pnp_enter_ext_func_mode(dev);
  74         pnp_enable_resources(dev);
  75         pnp_exit_ext_func_mode(dev);
  76 }
  77
  78 static void i3100_pnp_enable(device_t dev)
  79 {
  80         pnp_enter_ext_func_mode(dev);
  81         pnp_set_logical_device(dev);
  82         pnp_set_enable(dev, dev->enabled);
  83         pnp_exit_ext_func_mode(dev);
  84 }
  85
  86 static struct device_operations ops = {
  87         .read_resources   = pnp_read_resources,
  88         .set_resources    = i3100_pnp_set_resources,
  89         .enable_resources = i3100_pnp_enable_resources,
  90         .enable           = i3100_pnp_enable,
  91         .init             = i3100_init,
  92 };
  93
  94 static struct pnp_info pnp_dev_info[] = {
  95         { &ops, I3100_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
  96         { &ops, I3100_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
  97 };
  98
  99 static void enable_dev(struct device *dev)
 100 {
 101         pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
 102 }
 103
 104 struct chip_operations superio_intel_i3100_ops = {
 105         CHIP_NAME("Intel 3100 Super I/O")
 106         .enable_dev = enable_dev,
 107 };