src/superio/fintek/f81865f/superio.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2011 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20
  21 #include <arch/io.h>
  22 #include <device/device.h>
  23 #include <device/pnp.h>
  24 #include <console/console.h>
  25 #include <stdlib.h>
  26 #include "chip.h"
  27 #include "f81865f.h"
  28
  29 static void pnp_enter_conf_state(device_t dev)
  30 {
  31         outb(0x87, dev->path.pnp.port);
  32         outb(0x87, dev->path.pnp.port);
  33 }
  34
  35 static void pnp_exit_conf_state(device_t dev)
  36 {
  37         outb(0xaa, dev->path.pnp.port);
  38 }
  39
  40 static void f81865f_init(device_t dev)
  41 {
  42         struct superio_fintek_f81865f_config *conf = dev->chip_info;
  43
  44         if (!dev->enabled)
  45                 return;
  46
  47         switch (dev->path.pnp.device) {
  48         /* TODO: Might potentially need code for HWM or FDC etc. */
  49         case F81865F_KBC:
  50                 pc_keyboard_init(&conf->keyboard);
  51                 break;
  52         }
  53 }
  54
  55 static void f81865f_pnp_set_resources(device_t dev)
  56 {
  57         pnp_enter_conf_state(dev);
  58         pnp_set_resources(dev);
  59         pnp_exit_conf_state(dev);
  60 }
  61
  62 static void f81865f_pnp_enable_resources(device_t dev)
  63 {
  64         pnp_enter_conf_state(dev);
  65         pnp_enable_resources(dev);
  66         pnp_exit_conf_state(dev);
  67 }
  68
  69 static void f81865f_pnp_enable(device_t dev)
  70 {
  71         pnp_enter_conf_state(dev);
  72         pnp_set_logical_device(dev);
  73         (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0);
  74         pnp_exit_conf_state(dev);
  75 }
  76
  77 static struct device_operations ops = {
  78         .read_resources   = pnp_read_resources,
  79         .set_resources    = f81865f_pnp_set_resources,
  80         .enable_resources = f81865f_pnp_enable_resources,
  81         .enable           = f81865f_pnp_enable,
  82         .init             = f81865f_init,
  83 };
  84
  85 static struct pnp_info pnp_dev_info[] = {
  86         /* TODO: Some of the 0x7f8 etc. values may not be correct. */
  87         { &ops, F81865F_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
  88         { &ops, F81865F_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
  89         { &ops, F81865F_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
  90         { &ops, F81865F_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, { 0x07ff, 0}, },
  91         { &ops, F81865F_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
  92         { &ops, F81865F_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
  93         { &ops, F81865F_GPIO, PNP_IRQ0, },
  94         { &ops, F81865F_PME, },
  95 };
  96
  97 static void enable_dev(device_t dev)
  98 {
  99         pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
 100 }
 101
 102 struct chip_operations superio_fintek_f81865f_ops = {
 103         CHIP_NAME("Fintek F81865F Super I/O")
 104         .enable_dev = enable_dev
 105 };