2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <device/device.h>
23 #include <device/pnp.h>
24 #include <console/console.h>
30 static void pnp_enter_conf_state(device_t dev)
32 outb(0x87, dev->path.pnp.port);
33 outb(0x87, dev->path.pnp.port);
36 static void pnp_exit_conf_state(device_t dev)
38 outb(0xaa, dev->path.pnp.port);
41 static void f71863fg_init(device_t dev)
43 struct superio_fintek_f71863fg_config *conf = dev->chip_info;
44 struct resource *res0;
49 switch(dev->path.pnp.device) {
50 /* TODO: Might potentially need code for HWM or FDC etc. */
52 res0 = find_resource(dev, PNP_IDX_IO0);
53 init_uart8250(res0->base, &conf->com1);
56 res0 = find_resource(dev, PNP_IDX_IO0);
57 init_uart8250(res0->base, &conf->com2);
60 res0 = find_resource(dev, PNP_IDX_IO0);
61 pc_keyboard_init(&conf->keyboard);
66 static void f71863fg_pnp_set_resources(device_t dev)
68 pnp_enter_conf_state(dev);
69 pnp_set_resources(dev);
70 pnp_exit_conf_state(dev);
73 static void f71863fg_pnp_enable_resources(device_t dev)
75 pnp_enter_conf_state(dev);
76 pnp_enable_resources(dev);
77 pnp_exit_conf_state(dev);
80 static void f71863fg_pnp_enable(device_t dev)
82 pnp_enter_conf_state(dev);
83 pnp_set_logical_device(dev);
84 (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0);
85 pnp_exit_conf_state(dev);
88 static struct device_operations ops = {
89 .read_resources = pnp_read_resources,
90 .set_resources = f71863fg_pnp_set_resources,
91 .enable_resources = f71863fg_pnp_enable_resources,
92 .enable = f71863fg_pnp_enable,
93 .init = f71863fg_init,
96 static struct pnp_info pnp_dev_info[] = {
97 /* TODO: Some of the 0x7f8 etc. values may not be correct. */
98 { &ops, F71863FG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0 }, },
99 { &ops, F71863FG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
100 { &ops, F71863FG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
101 { &ops, F71863FG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0 }, },
102 { &ops, F71863FG_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
103 { &ops, F71863FG_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, },
104 { &ops, F71863FG_GPIO, },
105 { &ops, F71863FG_VID, PNP_IO0, { 0x07f8, 0 }, },
106 { &ops, F71863FG_SPI, },
107 { &ops, F71863FG_PME, },
110 static void enable_dev(device_t dev)
112 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
115 struct chip_operations superio_fintek_f71863fg_ops = {
116 CHIP_NAME("Fintek F71863FG Super I/O")
117 .enable_dev = enable_dev