src/superio/fintek/f71859/superio.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2010 Marc Jones <marcj303@gmail.com>
   5  * Copyright (C) 2008 Corey Osgood <corey.osgood@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  20  */
  21
  22 #include <arch/io.h>
  23 #include <device/device.h>
  24 #include <device/pnp.h>
  25 #include <console/console.h>
  26 #include <stdlib.h>
  27 #include <uart8250.h>
  28 #include "chip.h"
  29 #include "f71859.h"
  30
  31 static void pnp_enter_conf_state(device_t dev)
  32 {
  33         outb(0x87, dev->path.pnp.port);
  34 }
  35
  36 static void pnp_exit_conf_state(device_t dev)
  37 {
  38         outb(0xaa, dev->path.pnp.port);
  39 }
  40
  41 static void f71859_init(device_t dev)
  42 {
  43         struct superio_fintek_f71859_config *conf = dev->chip_info;
  44         struct resource *res0;
  45
  46         if (!dev->enabled)
  47                 return;
  48
  49         switch(dev->path.pnp.device) {
  50         /* TODO: Might potentially need code for HWM or FDC etc. */
  51         case F71859_SP1:
  52                 res0 = find_resource(dev, PNP_IDX_IO0);
  53                 init_uart8250(res0->base, &conf->com1);
  54                 break;
  55         }
  56 }
  57
  58 static void f71859_pnp_set_resources(device_t dev)
  59 {
  60         pnp_enter_conf_state(dev);
  61         pnp_set_resources(dev);
  62         pnp_exit_conf_state(dev);
  63 }
  64
  65 static void f71859_pnp_enable_resources(device_t dev)
  66 {
  67         pnp_enter_conf_state(dev);
  68         pnp_enable_resources(dev);
  69         pnp_exit_conf_state(dev);
  70 }
  71
  72 static void f71859_pnp_enable(device_t dev)
  73 {
  74         pnp_enter_conf_state(dev);
  75         pnp_set_logical_device(dev);
  76         (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0);
  77         pnp_exit_conf_state(dev);
  78 }
  79
  80 static struct device_operations ops = {
  81         .read_resources   = pnp_read_resources,
  82         .set_resources    = f71859_pnp_set_resources,
  83         .enable_resources = f71859_pnp_enable_resources,
  84         .enable           = f71859_pnp_enable,
  85         .init             = f71859_init,
  86 };
  87
  88 static struct pnp_info pnp_dev_info[] = {
  89         /* TODO: Some of the 0x7f8 etc. values may not be correct. */
  90         { &ops, F71859_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
  91
  92 };
  93
  94 static void enable_dev(device_t dev)
  95 {
  96         pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
  97 }
  98
  99 struct chip_operations superio_fintek_f71859_ops = {
 100         CHIP_NAME("Fintek F71859 Super I/O")
 101         .enable_dev = enable_dev
 102 };