src/superio/fintek/f71805f/superio.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008 Corey Osgood <corey.osgood@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20
  21 #include <arch/io.h>
  22 #include <device/device.h>
  23 #include <device/pnp.h>
  24 #include <console/console.h>
  25 #include <stdlib.h>
  26 #include <uart8250.h>
  27 #include "chip.h"
  28 #include "f71805f.h"
  29
  30 static void pnp_enter_conf_state(device_t dev)
  31 {
  32         outb(0x87, dev->path.pnp.port);
  33         outb(0x87, dev->path.pnp.port);
  34 }
  35
  36 static void pnp_exit_conf_state(device_t dev)
  37 {
  38         outb(0xaa, dev->path.pnp.port);
  39 }
  40
  41 static void f71805f_init(device_t dev)
  42 {
  43         struct superio_fintek_f71805f_config *conf = dev->chip_info;
  44         struct resource *res0;
  45
  46         if (!dev->enabled)
  47                 return;
  48
  49         switch(dev->path.pnp.device) {
  50         /* TODO: Might potentially need code for HWM or FDC etc. */
  51         case F71805F_SP1:
  52                 res0 = find_resource(dev, PNP_IDX_IO0);
  53                 init_uart8250(res0->base, &conf->com1);
  54                 break;
  55         case F71805F_SP2:
  56                 res0 = find_resource(dev, PNP_IDX_IO0);
  57                 init_uart8250(res0->base, &conf->com2);
  58                 break;
  59         }
  60 }
  61
  62 static void f71805f_pnp_set_resources(device_t dev)
  63 {
  64         pnp_enter_conf_state(dev);
  65         pnp_set_resources(dev);
  66         pnp_exit_conf_state(dev);
  67 }
  68
  69 static void f71805f_pnp_enable_resources(device_t dev)
  70 {
  71         pnp_enter_conf_state(dev);
  72         pnp_enable_resources(dev);
  73         pnp_exit_conf_state(dev);
  74 }
  75
  76 static void f71805f_pnp_enable(device_t dev)
  77 {
  78         pnp_enter_conf_state(dev);
  79         pnp_set_logical_device(dev);
  80         (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0);
  81         pnp_exit_conf_state(dev);
  82 }
  83
  84 static struct device_operations ops = {
  85         .read_resources   = pnp_read_resources,
  86         .set_resources    = f71805f_pnp_set_resources,
  87         .enable_resources = f71805f_pnp_enable_resources,
  88         .enable           = f71805f_pnp_enable,
  89         .init             = f71805f_init,
  90 };
  91
  92 static struct pnp_info pnp_dev_info[] = {
  93         /* TODO: Some of the 0x7f8 etc. values may not be correct. */
  94         { &ops, F71805F_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
  95         { &ops, F71805F_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
  96         { &ops, F71805F_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
  97         { &ops, F71805F_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
  98         { &ops, F71805F_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
  99         { &ops, F71805F_GPIO, PNP_IRQ0, },
 100         { &ops, F71805F_PME, },
 101 };
 102
 103 static void enable_dev(device_t dev)
 104 {
 105         pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
 106 }
 107
 108 struct chip_operations superio_fintek_f71805f_ops = {
 109         CHIP_NAME("Fintek F71805F/FG Super I/O")
 110         .enable_dev = enable_dev
 111 };