src/southbridge/via/vt8237r/vt8237_fadt.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com>
   5  * Copyright (C) 2007, 2009 Rudolf Marek <r.marek@assembler.cz>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  20  */
  21
  22 #include <string.h>
  23 #include <arch/acpi.h>
  24 #include <device/device.h>
  25 #include <device/pci.h>
  26 #include <device/pci_ids.h>
  27 #include "vt8237r.h"
  28
  29 /**
  30  * Create the Fixed ACPI Description Tables (FADT) for any board with this SB.
  31  */
  32 void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
  33 {
  34         acpi_header_t *header = &(fadt->header);
  35         device_t dev;
  36         int is_vt8237s = 0;
  37
  38         /* Power management controller */
  39         dev = dev_find_device(PCI_VENDOR_ID_VIA,
  40                                 PCI_DEVICE_ID_VIA_VT8237S_LPC, 0);
  41
  42         if (dev)
  43                 is_vt8237s = 1;
  44
  45         memset((void *) fadt, 0, sizeof(acpi_fadt_t));
  46         memcpy(header->signature, "FACP", 4);
  47         header->length = 244;
  48         header->revision = 4;
  49         memcpy(header->oem_id, "COREBO", 6);
  50         memcpy(header->oem_table_id, "COREBOOT", 8);
  51         memcpy(header->asl_compiler_id, "CORE", 4);
  52         header->asl_compiler_revision = 42;
  53
  54         fadt->firmware_ctrl = facs;
  55         fadt->dsdt = dsdt;
  56         fadt->preferred_pm_profile = 0;
  57         fadt->sci_int = 9;
  58         fadt->smi_cmd = 0;
  59         fadt->acpi_enable = 0;
  60         fadt->acpi_disable = 0;
  61         fadt->s4bios_req = 0x0;
  62         fadt->pstate_cnt = 0x0;
  63
  64         fadt->pm1a_evt_blk = VT8237R_ACPI_IO_BASE;
  65         fadt->pm1b_evt_blk = 0x0;
  66         fadt->pm1a_cnt_blk = VT8237R_ACPI_IO_BASE + 0x4;
  67         fadt->pm1b_cnt_blk = 0x0;
  68         /* once we support C2/C3 this could be set to 0x22 and chipset needs to be adjusted too */
  69         fadt->pm2_cnt_blk = 0x0;
  70         fadt->pm_tmr_blk = VT8237R_ACPI_IO_BASE + 0x8;
  71         fadt->gpe0_blk = VT8237R_ACPI_IO_BASE + 0x20;
  72         if (is_vt8237s) {
  73                 fadt->gpe1_blk = VT8237R_ACPI_IO_BASE + 0x60;
  74                 fadt->gpe1_base = 0x10;
  75                 fadt->gpe1_blk_len = 4;
  76         } else {
  77                 fadt->gpe1_blk = 0x0;
  78                 fadt->gpe1_base = 0;
  79                 fadt->gpe1_blk_len = 0;
  80         }
  81
  82         fadt->pm1_evt_len = 4;
  83         fadt->pm1_cnt_len = 2;
  84         fadt->pm2_cnt_len = 0;
  85         fadt->pm_tmr_len = 4;
  86         fadt->gpe0_blk_len = 4;
  87
  88         fadt->cst_cnt = 0;
  89         fadt->p_lvl2_lat = 90;
  90         fadt->p_lvl3_lat = 900;
  91         fadt->flush_size = 0;
  92         fadt->flush_stride = 0;
  93         fadt->duty_offset = 0;
  94         fadt->duty_width = 1;   //??
  95         fadt->day_alrm = 0x7d;
  96         fadt->mon_alrm = 0x7e;
  97         fadt->century = 0x32;
  98         /* We have legacy devices, 8042, VGA is ok to probe, MSI are not supported */
  99         fadt->iapc_boot_arch = 0xb;
 100         /* check me */
 101         fadt->flags = 0xa5;
 102
 103         fadt->reset_reg.space_id = 0;
 104         fadt->reset_reg.bit_width = 0;
 105         fadt->reset_reg.bit_offset = 0;
 106         fadt->reset_reg.resv = 0;
 107         fadt->reset_reg.addrl = 0x0;
 108         fadt->reset_reg.addrh = 0x0;
 109
 110         fadt->reset_value = 0;
 111         fadt->x_firmware_ctl_l = facs;
 112         fadt->x_firmware_ctl_h = 0;
 113         fadt->x_dsdt_l = dsdt;
 114         fadt->x_dsdt_h = 0;
 115
 116         fadt->x_pm1a_evt_blk.space_id = 1;
 117         fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
 118         fadt->x_pm1a_evt_blk.bit_offset = 0;
 119         fadt->x_pm1a_evt_blk.resv = 0;
 120         fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk;
 121         fadt->x_pm1a_evt_blk.addrh = 0x0;
 122
 123         fadt->x_pm1b_evt_blk.space_id = 1;
 124         fadt->x_pm1b_evt_blk.bit_width = fadt->pm1_evt_len * 8;
 125         fadt->x_pm1b_evt_blk.bit_offset = 0;
 126         fadt->x_pm1b_evt_blk.resv = 0;
 127         fadt->x_pm1b_evt_blk.addrl = fadt->pm1b_evt_blk;
 128         fadt->x_pm1b_evt_blk.addrh = 0x0;
 129
 130         fadt->x_pm1a_cnt_blk.space_id = 1;
 131         fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8;
 132         fadt->x_pm1a_cnt_blk.bit_offset = 0;
 133         fadt->x_pm1a_cnt_blk.resv = 0;
 134         fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk;
 135         fadt->x_pm1a_cnt_blk.addrh = 0x0;
 136
 137         fadt->x_pm1b_cnt_blk.space_id = 1;
 138         fadt->x_pm1b_cnt_blk.bit_width = fadt->pm1_cnt_len * 8;
 139         fadt->x_pm1b_cnt_blk.bit_offset = 0;
 140         fadt->x_pm1b_cnt_blk.resv = 0;
 141         fadt->x_pm1b_cnt_blk.addrl = fadt->pm1b_cnt_blk;
 142         fadt->x_pm1b_cnt_blk.addrh = 0x0;
 143
 144         fadt->x_pm2_cnt_blk.space_id = 1;
 145         fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8;
 146         fadt->x_pm2_cnt_blk.bit_offset = 0;
 147         fadt->x_pm2_cnt_blk.resv = 0;
 148         fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk;
 149         fadt->x_pm2_cnt_blk.addrh = 0x0;
 150
 151         fadt->x_pm_tmr_blk.space_id = 1;
 152         fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8;
 153         fadt->x_pm_tmr_blk.bit_offset = 0;
 154         fadt->x_pm_tmr_blk.resv = 0;
 155         fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk;
 156         fadt->x_pm_tmr_blk.addrh = 0x0;
 157
 158         fadt->x_gpe0_blk.space_id = 1;
 159         fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8;
 160         fadt->x_gpe0_blk.bit_offset = 0;
 161         fadt->x_gpe0_blk.resv = 0;
 162         fadt->x_gpe0_blk.addrl = fadt->gpe0_blk;
 163         fadt->x_gpe0_blk.addrh = 0x0;
 164
 165         fadt->x_gpe1_blk.space_id = 1;
 166         fadt->x_gpe1_blk.bit_width = fadt->gpe1_blk_len * 8;;
 167         fadt->x_gpe1_blk.bit_offset = 0;
 168         fadt->x_gpe1_blk.resv = 0;
 169         fadt->x_gpe1_blk.addrl = fadt->gpe1_blk;
 170         fadt->x_gpe1_blk.addrh = 0x0;
 171
 172         header->checksum = acpi_checksum((void *) fadt, sizeof(acpi_fadt_t));
 173 }