src/southbridge/via/vt8235/vt8235_usb.c

   1 #include <console/console.h>
   2 #include <device/device.h>
   3 #include <device/pci.h>
   4 #include <device/pci_ops.h>
   5 #include <device/pci_ids.h>
   6
   7 /* really nothing to do here, both usb 1.1 & 2.0 are normal PCI devices and so get resources allocated
   8    properly. They are part of the southbridge and are enabled in the chip enable function for the southbridge */
   9
  10 static void usb_init(struct device *dev)
  11 {
  12         printk(BIOS_DEBUG, "Configuring VIA USB 1.1\n");
  13
  14         /* pci_write_config8(dev, 0x04, 0x07); */
  15
  16         /*
  17          * To disable; though do we need to do this?
  18                 pci_write_config8(dev1, 0x3c, 0x00);
  19                 pci_write_config8(dev1, 0x04, 0x00);
  20
  21            Also, on the root dev, for enable:
  22                 regval = pci_read_config8(dev0, 0x50);
  23                 regval &= ~(0x36);
  24                 pci_write_config8(dev0, 0x50, regval);
  25
  26                 (regval |= 0x36; for disable)
  27          */
  28 }
  29
  30 /*
  31 static struct device_operations usb_ops = {
  32         .read_resources   = pci_dev_read_resources,
  33         .set_resources    = pci_dev_set_resources,
  34         .enable_resources = pci_dev_enable_resources,
  35         .init             = usb_init,
  36         .enable           = 0,
  37         .ops_pci          = 0,
  38 };
  39
  40 static const struct pci_driver northbridge_driver __pci_driver = {
  41         .ops    = &usb_ops,
  42         .vendor = PCI_VENDOR_ID_VIA,
  43         .device = PCI_DEVICE_ID_VIA_82C586_2,
  44 };
  45 */