pci1x2x: use devicetree register configuration
[coreboot.git] / src / southbridge / ti / pci1x2x / chip.h
1 #ifndef SOUTHBRIDGE_TI_PCI1X2X_H
2 #define SOUTHBRIDGE_TI_PCI1X2X_H
3
4 extern struct chip_operations southbridge_ti_pci1x2x_ops;
5
6 struct southbridge_ti_pci1x2x_config {
7         int scr;
8         int mrr;
9         int clsr;
10         int cltr;
11         int bcr;
12 };
13 #endif