2 * This file is part of the LinuxBIOS project.
4 * Copyright (C) 2004 Tyan Computer
5 * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
6 * Copyright (C) 2006,2007 AMD
7 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 #include <console/console.h>
25 #include <device/device.h>
26 #include <device/pci.h>
27 #include <device/pci_ids.h>
28 #include <device/pci_ops.h>
31 static void pci_init(struct device *dev)
36 #if CONFIG_PCI_64BIT_PREF_MEM == 1
37 device_t pci_domain_dev;
38 struct resource *mem1, *mem2;
41 /* System error enable */
42 dword = pci_read_config32(dev, 0x04);
43 dword |= (1<<8); /* System error enable */
44 dword |= (1<<30); /* Clear possible errors */
45 pci_write_config32(dev, 0x04, dword);
49 word = pci_read_config16(dev, 0x48);
50 word |= (1<<0); /* MRL2MRM */
51 word |= (1<<2); /* MR2MRM */
52 pci_write_config16(dev, 0x48, word);
56 dword = pci_read_config32(dev, 0x4c);
57 dword |= 0x00440000; /*TABORT_SER_ENABLE Park Last Enable.*/
58 pci_write_config32(dev, 0x4c, dword);
61 #if CONFIG_PCI_64BIT_PREF_MEM == 1
62 pci_domain_dev = dev->bus->dev;
63 while(pci_domain_dev) {
64 if(pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN) break;
65 pci_domain_dev = pci_domain_dev->bus->dev;
68 if(!pci_domain_dev) return; // impossiable
69 mem1 = find_resource(pci_domain_dev, 1); // prefmem, it could be 64bit
70 mem2 = find_resource(pci_domain_dev, 2); // mem
71 if(mem1->base > mem2->base) {
72 dword = mem2->base & (0xffff0000UL);
73 printk_debug("PCI DOMAIN mem2 base = 0x%010Lx\n", mem2->base);
75 dword = mem1->base & (0xffff0000UL);
76 printk_debug("PCI DOMAIN mem1 (prefmem) base = 0x%010Lx\n", mem1->base);
79 dword = dev_root.resource[1].base & (0xffff0000UL);
80 printk_debug("dev_root mem base = 0x%010Lx\n", dev_root.resource[1].base);
82 printk_debug("[0x50] <-- 0x%08x\n", dword);
83 pci_write_config32(dev, 0x50, dword); //TOM
87 static struct pci_operations lops_pci = {
91 static struct device_operations pci_ops = {
92 .read_resources = pci_bus_read_resources,
93 .set_resources = pci_dev_set_resources,
94 .enable_resources = pci_bus_enable_resources,
96 .scan_bus = pci_scan_bridge,
97 // .enable = mcp55_enable,
98 .reset_bus = pci_bus_reset,
102 static const struct pci_driver pci_driver __pci_driver = {
104 .vendor = PCI_VENDOR_ID_NVIDIA,
105 .device = PCI_DEVICE_ID_NVIDIA_MCP55_PCI,