2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25 #include <device/device.h>
27 struct southbridge_nvidia_mcp55_config
29 unsigned int ide0_enable : 1;
30 unsigned int ide1_enable : 1;
31 unsigned int sata0_enable : 1;
32 unsigned int sata1_enable : 1;
33 unsigned int mac_eeprom_smbus;
34 unsigned int mac_eeprom_addr;
36 struct chip_operations;
37 extern struct chip_operations southbridge_nvidia_mcp55_ops;
39 #endif /* MCP55_CHIP_H */