2 * This file is part of the coreboot project.
4 * Copyright (C) 2004 Tyan Computer
5 * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <console/console.h>
22 #include <device/device.h>
23 #include <device/pci.h>
24 #include <device/pci_ids.h>
25 #include <device/pci_ops.h>
28 static void usb1_init(struct device *dev)
30 struct southbridge_nvidia_ck804_config const *conf = dev->chip_info;
32 if (!conf->usb1_hc_reset)
36 * Somehow the warm reset does not really reset the USB
37 * controller. Later, during boot, when the Bus Master bit is
38 * set, the USB controller trashes the memory, causing weird
39 * misbehavior. Was detected on Sun Ultra40, where mptable
42 u32 bar0 = pci_read_config32(dev, 0x10);
43 u32 *regs = (u32 *) (bar0 & ~0xfff);
45 /* OHCI USB HCCommandStatus Register, HostControllerReset bit */
49 static struct device_operations usb_ops = {
50 .read_resources = pci_dev_read_resources,
51 .set_resources = pci_dev_set_resources,
52 .enable_resources = pci_dev_enable_resources,
54 // .enable = ck804_enable,
56 .ops_pci = &ck804_pci_ops,
59 static const struct pci_driver usb_driver __pci_driver = {
61 .vendor = PCI_VENDOR_ID_NVIDIA,
62 .device = PCI_DEVICE_ID_NVIDIA_CK804_USB,