2 * This file is part of the coreboot project.
4 * Copyright (C) 2004 Tyan Computer
5 * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <console/console.h>
22 #include <device/device.h>
23 #include <device/resource.h>
24 #include <device/pci.h>
25 #include <device/pci_ids.h>
26 #include <device/pci_ops.h>
29 static void pci_init(struct device *dev)
32 device_t pci_domain_dev;
33 struct resource *mem, *pref;
35 dword = pci_read_config32(dev, 0x04);
36 dword |= (1 << 8); /* System error enable */
37 dword |= (1 << 30); /* Clear possible errors */
38 pci_write_config32(dev, 0x04, dword);
41 word = pci_read_config16(dev, 0x48);
42 word |= (1 << 0); /* MRL2MRM */
43 word |= (1 << 2); /* MR2MRM */
44 pci_write_config16(dev, 0x48, word);
48 dword = pci_read_config32(dev, 0x4c);
49 dword |= 0x00440000; /* TABORT_SER_ENABLE Park Last Enable. */
50 pci_write_config32(dev, 0x4c, dword);
53 pci_domain_dev = dev->bus->dev;
54 while (pci_domain_dev) {
55 if (pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN)
57 pci_domain_dev = pci_domain_dev->bus->dev;
61 return; /* Impossible */
63 pref = probe_resource(pci_domain_dev, IOINDEX_SUBTRACTIVE(2,0));
64 mem = probe_resource(pci_domain_dev, IOINDEX_SUBTRACTIVE(1,0));
67 return; /* Impossible */
69 if (!pref || pref->base > mem->base) {
70 dword = mem->base & (0xffff0000UL);
71 printk(BIOS_DEBUG, "PCI DOMAIN mem base = 0x%010Lx\n", mem->base);
73 dword = pref->base & (0xffff0000UL);
74 printk(BIOS_DEBUG, "PCI DOMAIN pref base = 0x%010Lx\n", pref->base);
77 printk(BIOS_DEBUG, "[0x50] <-- 0x%08x\n", dword);
78 pci_write_config32(dev, 0x50, dword); /* TOM */
81 static struct device_operations pci_ops = {
82 .read_resources = pci_bus_read_resources,
83 .set_resources = pci_dev_set_resources,
84 .enable_resources = pci_bus_enable_resources,
86 .scan_bus = pci_scan_bridge,
87 // .enable = ck804_enable,
90 static const struct pci_driver pci_driver __pci_driver = {
92 .vendor = PCI_VENDOR_ID_NVIDIA,
93 .device = PCI_DEVICE_ID_NVIDIA_CK804_PCI,