src/southbridge/nvidia/ck804/fadt.c

   1 /*
   2  * ACPI - create the Fixed ACPI Description Tables (FADT)
   3  * (C) Copyright 2005 Stefan Reinauer <stepan@openbios.org>
   4  */
   5
   6 #include <string.h>
   7 #include <console/console.h>
   8 #include <arch/acpi.h>
   9
  10 extern unsigned pm_base;        /* pm_base should be set in sb acpi */
  11
  12 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
  13 {
  14         acpi_header_t *header = &(fadt->header);
  15
  16         printk(BIOS_DEBUG, "pm_base: 0x%04x\n", pm_base);
  17
  18         /* Prepare the header */
  19         memset((void *)fadt, 0, sizeof(acpi_fadt_t));
  20         memcpy(header->signature, "FACP", 4);
  21 #ifdef LONG_FADT
  22         header->length = 244;
  23         header->revision = 3;
  24 #else
  25         header->length = 0x74;
  26         header->revision = 1;
  27 #endif
  28         memcpy(header->oem_id, "CORE  ", 6);
  29         memcpy(header->oem_table_id, "CB-FADT ", 8);
  30         memcpy(header->asl_compiler_id, "IASL", 4);
  31         header->asl_compiler_revision = 0;
  32
  33         fadt->firmware_ctrl = (u32)facs;
  34         fadt->dsdt = (u32)dsdt;
  35         // 3=Workstation,4=Enterprise Server, 7=Performance Server
  36         fadt->preferred_pm_profile = 0;
  37         fadt->sci_int = 9;
  38         // disable system management mode by setting to 0:
  39         fadt->smi_cmd = 0;
  40         fadt->acpi_enable = 0;
  41         fadt->acpi_disable = 0;
  42         fadt->s4bios_req = 0x0;
  43         fadt->pstate_cnt = 0x0;
  44
  45         fadt->pm1a_evt_blk = pm_base;
  46         fadt->pm1b_evt_blk = 0x0000;
  47         fadt->pm1a_cnt_blk = pm_base + 0x04;
  48         fadt->pm1b_cnt_blk = 0x0000;
  49         fadt->pm2_cnt_blk = pm_base + 0x1c;
  50         fadt->pm_tmr_blk = pm_base + 0x08;
  51         fadt->gpe0_blk = pm_base + 0x20;
  52         fadt->gpe1_blk = 0x0000;
  53
  54         fadt->pm1_evt_len = 4;
  55         fadt->pm1_cnt_len = 2;
  56         fadt->pm2_cnt_len = 1;
  57         fadt->pm_tmr_len = 4;
  58         fadt->gpe0_blk_len = 8;
  59         fadt->gpe1_blk_len = 0;
  60         fadt->gpe1_base = 0;
  61         fadt->cst_cnt = 0;
  62         fadt->p_lvl2_lat = 0xffff;
  63         fadt->p_lvl3_lat = 0xffff;
  64         fadt->flush_size = 0;
  65         fadt->flush_stride = 0;
  66         fadt->duty_offset = 1;
  67         fadt->duty_width = 0;
  68         fadt->day_alrm = 0x7d;
  69         fadt->mon_alrm = 0x7e;
  70         fadt->century = 0x32;
  71         fadt->iapc_boot_arch = 0;
  72         fadt->flags = 0xa5;
  73
  74 #ifdef LONG_FADT
  75         fadt->res2 = 0;
  76
  77         fadt->reset_reg.space_id = 1;
  78         fadt->reset_reg.bit_width = 8;
  79         fadt->reset_reg.bit_offset = 0;
  80         fadt->reset_reg.resv = 0;
  81         fadt->reset_reg.addrl = 0xcf9;
  82         fadt->reset_reg.addrh = 0x0;
  83
  84         fadt->reset_value = 6;
  85         fadt->x_firmware_ctl_l = facs;
  86         fadt->x_firmware_ctl_h = 0;
  87         fadt->x_dsdt_l = dsdt;
  88         fadt->x_dsdt_h = 0;
  89
  90         fadt->x_pm1a_evt_blk.space_id = 1;
  91         fadt->x_pm1a_evt_blk.bit_width = 32;
  92         fadt->x_pm1a_evt_blk.bit_offset = 0;
  93         fadt->x_pm1a_evt_blk.resv = 0;
  94         fadt->x_pm1a_evt_blk.addrl = pm_base;
  95         fadt->x_pm1a_evt_blk.addrh = 0x0;
  96
  97         fadt->x_pm1b_evt_blk.space_id = 1;
  98         fadt->x_pm1b_evt_blk.bit_width = 4;
  99         fadt->x_pm1b_evt_blk.bit_offset = 0;
 100         fadt->x_pm1b_evt_blk.resv = 0;
 101         fadt->x_pm1b_evt_blk.addrl = 0x0;
 102         fadt->x_pm1b_evt_blk.addrh = 0x0;
 103
 104         fadt->x_pm1a_cnt_blk.space_id = 1;
 105         fadt->x_pm1a_cnt_blk.bit_width = 16;
 106         fadt->x_pm1a_cnt_blk.bit_offset = 0;
 107         fadt->x_pm1a_cnt_blk.resv = 0;
 108         fadt->x_pm1a_cnt_blk.addrl = pm_base + 4;
 109         fadt->x_pm1a_cnt_blk.addrh = 0x0;
 110
 111         fadt->x_pm1b_cnt_blk.space_id = 1;
 112         fadt->x_pm1b_cnt_blk.bit_width = 2;
 113         fadt->x_pm1b_cnt_blk.bit_offset = 0;
 114         fadt->x_pm1b_cnt_blk.resv = 0;
 115         fadt->x_pm1b_cnt_blk.addrl = 0x0;
 116         fadt->x_pm1b_cnt_blk.addrh = 0x0;
 117
 118         fadt->x_pm2_cnt_blk.space_id = 1;
 119         fadt->x_pm2_cnt_blk.bit_width = 0;
 120         fadt->x_pm2_cnt_blk.bit_offset = 0;
 121         fadt->x_pm2_cnt_blk.resv = 0;
 122         fadt->x_pm2_cnt_blk.addrl = 0x0;
 123         fadt->x_pm2_cnt_blk.addrh = 0x0;
 124
 125         fadt->x_pm_tmr_blk.space_id = 1;
 126         fadt->x_pm_tmr_blk.bit_width = 32;
 127         fadt->x_pm_tmr_blk.bit_offset = 0;
 128         fadt->x_pm_tmr_blk.resv = 0;
 129         fadt->x_pm_tmr_blk.addrl = pm_base + 0x08;
 130         fadt->x_pm_tmr_blk.addrh = 0x0;
 131
 132         fadt->x_gpe0_blk.space_id = 1;
 133         fadt->x_gpe0_blk.bit_width = 32;
 134         fadt->x_gpe0_blk.bit_offset = 0;
 135         fadt->x_gpe0_blk.resv = 0;
 136         fadt->x_gpe0_blk.addrl = pm_base + 0x20;
 137         fadt->x_gpe0_blk.addrh = 0x0;
 138
 139         fadt->x_gpe1_blk.space_id = 1;
 140         fadt->x_gpe1_blk.bit_width = 64;
 141         fadt->x_gpe1_blk.bit_offset = 16;
 142         fadt->x_gpe1_blk.resv = 0;
 143         fadt->x_gpe1_blk.addrl = pm_base + 0xb0;
 144         fadt->x_gpe1_blk.addrh = 0x0;
 145 #endif
 146         header->checksum = acpi_checksum((void *)fadt, header->length);
 147 }