2 * Copyright 2004 Tyan Computer
6 #include <console/console.h>
7 #include <device/device.h>
9 #include <device/pci.h>
10 #include <device/pci_ids.h>
11 #include <device/pci_ops.h>
14 #ifndef CK804_SATA_RESET_FOR_ATAPI
15 #define CK804_SATA_RESET_FOR_ATAPI 0
18 #if CK804_SATA_RESET_FOR_ATAPI
19 static void sata_com_reset(struct device *dev, unsigned reset)
27 base = (uint32_t *) pci_read_config32(dev, 0x24);
29 printk(BIOS_DEBUG, "base = %08lx\n", base);
32 *(base + 4) = 0xffffffff;
33 *(base + 0x44) = 0xffffffff;
41 *(base + 0x48) = dword;
47 *(base + 0x48) = dword;
54 printk(BIOS_DEBUG, "*(base+0)=%08x\n", dword);
59 if ((dword & 0x10000) != 0)
63 printk(BIOS_DEBUG, "loop=%d, *(base+4)=%08x\n", loop, dword);
66 dword = *(base + 0x40);
67 printk(BIOS_DEBUG, "*(base+0x40)=%08x\n", dword);
71 dword = *(base + 0x44);
72 if ((dword & 0x10000) != 0)
76 printk(BIOS_DEBUG, "loop=%d, *(base+0x44)=%08x\n", loop, dword);
81 static void sata_init(struct device *dev)
84 struct southbridge_nvidia_ck804_config *conf;
86 conf = dev->chip_info;
88 dword = pci_read_config32(dev, 0x50);
89 /* Ensure prefetch is disabled. */
90 dword &= ~((1 << 15) | (1 << 13));
91 if (conf->sata1_enable) {
92 /* Enable secondary SATA interface. */
94 printk(BIOS_DEBUG, "SATA S \t");
96 if (conf->sata0_enable) {
97 /* Enable primary SATA interface. */
99 printk(BIOS_DEBUG, "SATA P \n");
114 /* DO NOT relay OK and PAGE_FRNDLY_DTXFR_CNT. */
115 dword &= ~(0x1f << 24);
116 dword |= (0x15 << 24);
118 pci_write_config32(dev, 0x50, dword);
121 /* SLUMBER_DURING_D3 */
122 dword = pci_read_config32(dev, 0x7c);
124 pci_write_config32(dev, 0x7c, dword);
126 dword = pci_read_config32(dev, 0xd0);
127 dword &= ~(0xff << 24);
128 dword |= (0x68 << 24);
129 pci_write_config32(dev, 0xd0, dword);
131 dword = pci_read_config32(dev, 0xe0);
132 dword &= ~(0xff << 24);
133 dword |= (0x68 << 24);
134 pci_write_config32(dev, 0xe0, dword);
137 dword = pci_read_config32(dev, 0xf8);
139 pci_write_config32(dev, 0xf8, dword);
141 #if CK804_SATA_RESET_FOR_ATAPI
142 dword = pci_read_config32(dev, 0xac);
143 dword &= ~((1 << 13) | (1 << 14));
144 dword |= (1 << 13) | (0 << 14);
145 pci_write_config32(dev, 0xac, dword);
147 sata_com_reset(dev, 1); /* For discover some s-atapi device. */
152 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
154 pci_write_config32(dev, 0x40,
155 ((device & 0xffff) << 16) | (vendor & 0xffff));
158 static struct pci_operations lops_pci = {
159 .set_subsystem = lpci_set_subsystem,
162 static struct device_operations sata_ops = {
163 .read_resources = pci_dev_read_resources,
164 .set_resources = pci_dev_set_resources,
165 .enable_resources = pci_dev_enable_resources,
166 // .enable = ck804_enable,
169 .ops_pci = &lops_pci,
172 static const struct pci_driver sata0_driver __pci_driver = {
174 .vendor = PCI_VENDOR_ID_NVIDIA,
175 .device = PCI_DEVICE_ID_NVIDIA_CK804_SATA0,
178 static const struct pci_driver sata1_driver __pci_driver = {
180 .vendor = PCI_VENDOR_ID_NVIDIA,
181 .device = PCI_DEVICE_ID_NVIDIA_CK804_SATA1,