src/southbridge/intel/sch/mmc.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2009-2010 iWave Systems
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20
  21 #include <console/console.h>
  22 #include <device/device.h>
  23 #include <device/pci.h>
  24 #include <device/pci_ids.h>
  25 #include <arch/io.h>
  26
  27 static void sch_mmc_init(struct device *dev)
  28 {
  29         u32 reg32;
  30
  31         printk(BIOS_DEBUG, "MMC: Setting up controller.. ");
  32         reg32 = pci_read_config32(dev, PCI_COMMAND);
  33         reg32 |= PCI_COMMAND_MASTER;
  34         reg32 |= PCI_COMMAND_MEMORY;
  35         pci_write_config32(dev, PCI_COMMAND, reg32);
  36         printk(BIOS_DEBUG, "done.\n");
  37 }
  38
  39 static void sch_mmc_set_subsystem(device_t dev, unsigned vendor, unsigned device)
  40 {
  41         if (!vendor || !device) {
  42                 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
  43                                 pci_read_config32(dev, PCI_VENDOR_ID));
  44         } else {
  45                 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
  46                                 ((device & 0xffff) << 16) | (vendor & 0xffff));
  47         }
  48
  49 }
  50
  51 static struct pci_operations lops_pci = {
  52         .set_subsystem  = &sch_mmc_set_subsystem,
  53 };
  54
  55 static struct device_operations sch_mmc_ops = {
  56         .read_resources         = pci_dev_read_resources,
  57         .set_resources          = pci_dev_set_resources,
  58         .enable_resources       = pci_dev_enable_resources,
  59         .init                   = sch_mmc_init,
  60         .scan_bus               = 0,
  61         .ops_pci                = &lops_pci,
  62 };
  63
  64 static const struct pci_driver sch_mmc1 __pci_driver = {
  65         .ops    = &sch_mmc_ops,
  66         .vendor = PCI_VENDOR_ID_INTEL,
  67         .device = 0x811C,
  68 };
  69
  70 static const struct pci_driver sch_mmc2 __pci_driver = {
  71         .ops    = &sch_mmc_ops,
  72         .vendor = PCI_VENDOR_ID_INTEL,
  73         .device = 0x811D,
  74 };
  75
  76 static const struct pci_driver sch_mmc3 __pci_driver = {
  77         .ops    = &sch_mmc_ops,
  78         .vendor = PCI_VENDOR_ID_INTEL,
  79         .device = 0x811E,
  80
  81 };
  82