9702313f9c121e97a177b2f115bbb7fcc9c9928f
[coreboot.git] / src / southbridge / intel / i82801er / cmos_failover.c
1 //kind of cmos_err for ich5
2 #define RTC_FAILED    (1 <<2)
3 #define GEN_PMCON_3     0xa4
4 static void check_cmos_failed(void) 
5 {
6
7                 uint8_t byte;
8                 byte = pci_read_config8(PCI_DEV(0,0x1f,0),GEN_PMCON_3);
9                 if( byte & RTC_FAILED){
10 //clear bit 1 and bit 2
11                         byte = cmos_read(RTC_BOOT_BYTE);
12                         byte &= 0x0c;
13                         byte |= MAX_REBOOT_CNT << 4;
14                         cmos_write(byte, RTC_BOOT_BYTE);
15                 }
16 }