Work around stack size breakage observed on fam10.
[coreboot.git] / src / southbridge / intel / i82801dbm / i82801dbm_pci.c
1 #include <console/console.h>
2 #include <device/device.h>
3 #include <device/pci.h>
4 #include <device/pci_ids.h>
5 #include <device/pci_ops.h>
6 #include "i82801dbm.h"
7
8 static void pci_init(struct device *dev)
9 {
10         /* Enable pci error detecting */
11         uint32_t dword;
12         /* System error enable */
13         dword = pci_read_config32(dev, 0x04);
14         dword |= (1<<8); /* SERR# Enable */
15         dword |= (1<<6); /* Parity Error Response */
16         pci_write_config32(dev, 0x04, dword);
17
18 }
19
20 static struct device_operations pci_ops  = {
21         .read_resources   = pci_bus_read_resources,
22         .set_resources    = pci_dev_set_resources,
23         .enable_resources = pci_bus_enable_resources,
24         .init             = pci_init,
25         .scan_bus         = pci_scan_bridge,
26 };
27
28 static const struct pci_driver pci_driver __pci_driver = {
29         .ops    = &pci_ops,
30         .vendor = PCI_VENDOR_ID_INTEL,
31         .device = PCI_DEVICE_ID_INTEL_82801DBM_PCI,
32 };
33