2 * This file is part of the coreboot project.
4 * Copyright (C) 2005 Yinghai Lu <yinghailu@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <device/smbus_def.h>
23 static void smbus_delay(void)
28 static int smbus_wait_until_ready(void)
30 unsigned loops = SMBUS_TIMEOUT;
36 byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);
38 return loops ? 0 : -1;
41 static int smbus_wait_until_done(void)
43 unsigned loops = SMBUS_TIMEOUT;
49 byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);
50 } while ((byte & 1) || (byte & ~((1 << 6) | (1 << 0))) == 0);
51 return loops ? 0 : -1;
55 static int smbus_wait_until_blk_done(void)
57 unsigned loops = SMBUS_TIMEOUT;
63 byte = inb(SMBUS_IO_BASE + SMBHSTSTAT);
64 } while ((byte & (1 << 7)) == 0);
65 return loops ? 0 : -1;
69 static int do_smbus_read_byte(unsigned device, unsigned address)
71 unsigned char global_status_register;
74 if (smbus_wait_until_ready() < 0) {
75 return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
77 /* Setup transaction */
78 /* Disable interrupts */
79 outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);
80 /* Set the device I'm talking too */
81 outb(((device & 0x7f) << 1) | 1, SMBUS_IO_BASE + SMBXMITADD);
82 /* Set the command/address... */
83 outb(address & 0xff, SMBUS_IO_BASE + SMBHSTCMD);
84 /* Set up for a byte data read */
85 outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xe3) | (0x2 << 2),
86 (SMBUS_IO_BASE + SMBHSTCTL));
87 /* Clear any lingering errors, so the transaction will run */
88 outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
90 /* Clear the data byte... */
91 outb(0, SMBUS_IO_BASE + SMBHSTDAT0);
93 /* Start the command */
94 outb((inb(SMBUS_IO_BASE + SMBHSTCTL) | 0x40),
95 SMBUS_IO_BASE + SMBHSTCTL);
97 /* Poll for transaction completion */
98 if (smbus_wait_until_done() < 0) {
99 return SMBUS_WAIT_UNTIL_DONE_TIMEOUT;
102 global_status_register = inb(SMBUS_IO_BASE + SMBHSTSTAT);
104 /* Ignore the "In Use" status... */
105 global_status_register &= ~(3 << 5);
107 /* Read results of transaction */
108 byte = inb(SMBUS_IO_BASE + SMBHSTDAT0);
109 if (global_status_register != (1 << 1)) {
116 static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd,
117 unsigned data1, unsigned data2)
123 print_err("Untested smbus_write_block called\n");
125 /* Clear the PM timeout flags, SECOND_TO_STS */
126 outw(inw(PMBASE_ADDR + 0x66), PMBASE_ADDR + 0x66);
128 if (smbus_wait_until_ready() < 0) {
132 /* Setup transaction */
133 /* Obtain ownership */
134 outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
135 for (stat = 0; (stat & 0x40) == 0;) {
136 stat = inb(SMBUS_IO_BASE + SMBHSTSTAT);
138 /* Clear the done bit */
139 outb(0x80, SMBUS_IO_BASE + SMBHSTSTAT);
140 /* Disable interrupts */
141 outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);
143 /* Set the device I'm talking too */
144 outb(((device & 0x7f) << 1), SMBUS_IO_BASE + SMBXMITADD);
146 /* Set the command address */
147 outb(cmd & 0xff, SMBUS_IO_BASE + SMBHSTCMD);
149 /* Set the block length */
150 outb(length & 0xff, SMBUS_IO_BASE + SMBHSTDAT0);
152 /* Try sending out the first byte of data here */
153 byte = (data1 >> (0)) & 0x0ff;
154 outb(byte, SMBUS_IO_BASE + SMBBLKDAT);
155 /* Issue a block write command */
156 outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xe3) | (0x5 << 2) | 0x40,
157 SMBUS_IO_BASE + SMBHSTCTL);
159 for (i = 0; i < length; i++) {
160 /* Poll for transaction completion */
161 if (smbus_wait_until_blk_done() < 0) {
165 /* Load the next byte */
167 byte = (data2 >> (i % 4)) & 0x0ff;
169 byte = (data1 >> (i)) & 0x0ff;
170 outb(byte, SMBUS_IO_BASE + SMBBLKDAT);
172 /* Clear the done bit */
173 outb(inb(SMBUS_IO_BASE + SMBHSTSTAT),
174 SMBUS_IO_BASE + SMBHSTSTAT);
177 print_debug("SMBUS Block complete\n");