8a5476f494156eef50df3361995cde469bdba024
[coreboot.git] / src / southbridge / intel / i82801bx / i82801bx_smbus.c
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2005 Yinghai Lu <yinghailu@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
19  */
20
21 /* TODO: Check datasheets if this will work for all ICH* southbridges. */
22
23 #include <stdint.h>
24 #include <smbus.h>
25 #include <pci.h>
26 #include <arch/io.h>
27 #include "i82801bx.h"
28 #include "i82801_smbus.h"
29
30 static int smbus_read_byte(struct bus *bus, device_t dev, u8 address)
31 {
32         unsigned device;        /* TODO: u16? */
33         struct resource *res;
34
35         device = dev->path.i2c.device;
36         res = find_resource(bus->dev, 0x20);
37
38         return do_smbus_read_byte(res->base, device, address);
39 }
40
41 static struct smbus_bus_operations lops_smbus_bus = {
42         .read_byte      = smbus_read_byte,
43 };
44
45 static const struct device_operations smbus_ops = {
46         .read_resources         = pci_dev_read_resources,
47         .set_resources          = pci_dev_set_resources,
48         .enable_resources       = pci_dev_enable_resources,
49         .init                   = 0,
50         .scan_bus               = scan_static_bus,
51         .enable                 = i82801er_enable,
52         .ops_smbus_bus          = &lops_smbus_bus,
53 };
54
55 /* 82801AA (ICH) */
56 static const struct pci_driver i82801aa_smb __pci_driver = {
57         .ops    = &smbus_ops,
58         .vendor = PCI_VENDOR_ID_INTEL,
59         .device = PCI_DEVICE_ID_INTEL_82801AA_SMB,
60 };
61
62 /* 82801AB (ICH0) */
63 static const struct pci_driver i82801ab_smb __pci_driver = {
64         .ops    = &smbus_ops,
65         .vendor = PCI_VENDOR_ID_INTEL,
66         .device = PCI_DEVICE_ID_INTEL_82801AB_SMB,
67 };
68
69 /* 82801BA/BAM (ICH2/ICH2-M) */
70 static const struct pci_driver i82801ba_smb __pci_driver = {
71         .ops    = &smbus_ops,
72         .vendor = PCI_VENDOR_ID_INTEL,
73         .device = PCI_DEVICE_ID_INTEL_82801BA_SMB,
74 };
75
76 /* 82801CA/CAM (ICH3-S/ICH3-M) */
77 static const struct pci_driver i82801ca_smb __pci_driver = {
78         .ops    = &smbus_ops,
79         .vendor = PCI_VENDOR_ID_INTEL,
80         .device = PCI_DEVICE_ID_INTEL_82801CA_SMB,
81 };
82
83 /* 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) */
84 static const struct pci_driver i82801db_smb __pci_driver = {
85         .ops    = &smbus_ops,
86         .vendor = PCI_VENDOR_ID_INTEL,
87         .device = PCI_DEVICE_ID_INTEL_82801DB_SMB,
88 };
89
90 /* 82801EB/ER (ICH5/ICH5R) */
91 static const struct pci_driver i82801eb_smb __pci_driver = {
92         .ops    = &smbus_ops,
93         .vendor = PCI_VENDOR_ID_INTEL,
94         .device = PCI_DEVICE_ID_INTEL_82801EB_SMB,
95 };
96
97 /* 82801FB/FR/FW/FRW/FBM (ICH6/ICH6R/ICH6W/ICH6RW/ICH6-M) */
98 static const struct pci_driver i82801fb_smb __pci_driver = {
99         .ops    = &smbus_ops,
100         .vendor = PCI_VENDOR_ID_INTEL,
101         .device = PCI_DEVICE_ID_INTEL_82801FB_SMB,
102 };
103
104 /* 82801E (C-ICH) */
105 static const struct pci_driver i82801e_smb __pci_driver = {
106         .ops    = &smbus_ops,
107         .vendor = PCI_VENDOR_ID_INTEL,
108         .device = PCI_DEVICE_ID_INTEL_82801E_SMB,
109 };