2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Corey Osgood <corey_osgood@verizon.net>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * The i82801bx code currently supports:
32 * This code should NOT be used for ICH6 and later versions.
35 #ifndef SOUTHBRIDGE_INTEL_I82801BX_CHIP_H
36 #define SOUTHBRIDGE_INTEL_I82801BX_CHIP_H
38 struct southbridge_intel_i82801bx_config {
40 * Interrupt Routing configuration
41 * If bit7 is 1, the interrupt is disabled.
43 uint8_t pirqa_routing;
44 uint8_t pirqb_routing;
45 uint8_t pirqc_routing;
46 uint8_t pirqd_routing;
47 uint8_t pirqe_routing;
48 uint8_t pirqf_routing;
49 uint8_t pirqg_routing;
50 uint8_t pirqh_routing;
56 extern struct chip_operations southbridge_intel_i82801bx_ops;