1 #include <device/smbus_def.h>
3 #define SMBHST_STATUS 0x0
6 #define SMBHST_ADDR 0x4
9 #define SMBUS_TIMEOUT (100*1000*10)
10 #define SMBUS_STATUS_MASK 0x1e
11 #define SMBUS_ERROR_FLAG (1<<2)
13 static inline void smbus_delay(void)
23 static int smbus_wait_until_ready(unsigned smbus_io_base)
26 loops = SMBUS_TIMEOUT;
30 val = inb(smbus_io_base + SMBHST_STATUS);
31 if ((val & 0x1) == 0) {
35 if(loops == (SMBUS_TIMEOUT / 2)) {
36 outw(inw(smbus_io_base + SMBHST_STATUS),
37 smbus_io_base + SMBHST_STATUS);
41 return loops?0:SMBUS_WAIT_UNTIL_READY_TIMEOUT;
44 static int smbus_wait_until_done(unsigned smbus_io_base)
47 loops = SMBUS_TIMEOUT;
52 val = inb(smbus_io_base + SMBHST_STATUS);
53 // Make sure the command is done
54 if ((val & 0x1) != 0) {
57 // Don't break out until one of the interrupt
63 return loops?0:SMBUS_WAIT_UNTIL_DONE_TIMEOUT;
66 static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address)
68 unsigned status_register;
71 if (smbus_wait_until_ready(smbus_io_base) < 0) {
72 return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
75 /* setup transaction */
77 /* clear any lingering errors, so the transaction will run */
78 outb(0x1e, smbus_io_base + SMBHST_STATUS);
80 /* set the device I'm talking too */
81 outb(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHST_ADDR);
83 /* set the command/address... */
84 outb(address & 0xff, smbus_io_base + SMBHST_CMD);
86 /* clear the data word...*/
87 outb(0, smbus_io_base + SMBHST_DAT);
89 /* start a byte read with interrupts disabled */
90 outb( (0x02 << 2)|(1<<6), smbus_io_base + SMBHST_CTL);
92 /* poll for transaction completion */
93 if (smbus_wait_until_done(smbus_io_base) < 0) {
94 return SMBUS_WAIT_UNTIL_DONE_TIMEOUT;
97 status_register = inw(smbus_io_base + SMBHST_STATUS);
99 /* read results of transaction */
100 byte = inw(smbus_io_base + SMBHST_DAT) & 0xff;
102 if (status_register & 0x04) {
104 print_debug("Read fail ");
105 print_debug_hex16(status_register);