2 * This file is part of the LinuxBIOS project.
4 * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #ifndef SOUTHBRIDGE_INTEL_I82371EB_H
22 #define SOUTHBRIDGE_INTEL_I82371EB_H
26 void i82371eb_enable(device_t dev);
29 #define PCICMD 0x04 /* PCI Command Register */
30 #define XBCS 0x4e /* X-Bus Chip Select register */
33 #define SMBBA 0x90 /* SMBus Base Address */
34 #define SMBHSTCFG 0xd2 /* SMBus Host Configuration */
37 #define IDETIM_PRI 0x40 /* IDE timing register, primary channel */
38 #define IDETIM_SEC 0x42 /* IDE timing register, secondary channel */
41 #define IOSE (1 << 0) /* I/O Space Enable */
42 #define SMB_HST_EN (1 << 0) /* Host Interface Enable */
43 #define IDE_DECODE_ENABLE (1 << 15) /* IDE Decode Enable */
45 #endif /* SOUTHBRIDGE_INTEL_I82371EB_H */