2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
23 #include <console/console.h>
26 #if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
27 /* HFS1[3:0] Current Working State Values */
28 static const char *me_cws_values[] = {
29 [ME_HFS_CWS_RESET] = "Reset",
30 [ME_HFS_CWS_INIT] = "Initializing",
31 [ME_HFS_CWS_REC] = "Recovery",
32 [ME_HFS_CWS_NORMAL] = "Normal",
33 [ME_HFS_CWS_WAIT] = "Platform Disable Wait",
34 [ME_HFS_CWS_TRANS] = "OP State Transition",
35 [ME_HFS_CWS_INVALID] = "Invalid CPU Plugged In"
38 /* HFS1[8:6] Current Operation State Values */
39 static const char *me_opstate_values[] = {
40 [ME_HFS_STATE_PREBOOT] = "Preboot",
41 [ME_HFS_STATE_M0_UMA] = "M0 with UMA",
42 [ME_HFS_STATE_M3] = "M3 without UMA",
43 [ME_HFS_STATE_M0] = "M0 without UMA",
44 [ME_HFS_STATE_BRINGUP] = "Bring up",
45 [ME_HFS_STATE_ERROR] = "M0 without UMA but with error"
48 /* HFS[19:16] Current Operation Mode Values */
49 static const char *me_opmode_values[] = {
50 [ME_HFS_MODE_NORMAL] = "Normal",
51 [ME_HFS_MODE_DEBUG] = "Debug",
52 [ME_HFS_MODE_DIS] = "Soft Temporary Disable",
53 [ME_HFS_MODE_OVER_JMPR] = "Security Override via Jumper",
54 [ME_HFS_MODE_OVER_MEI] = "Security Override via MEI Message"
57 /* HFS[15:12] Error Code Values */
58 static const char *me_error_values[] = {
59 [ME_HFS_ERROR_NONE] = "No Error",
60 [ME_HFS_ERROR_UNCAT] = "Uncategorized Failure",
61 [ME_HFS_ERROR_IMAGE] = "Image Failure",
62 [ME_HFS_ERROR_DEBUG] = "Debug Failure"
65 /* GMES[31:28] ME Progress Code */
66 static const char *me_progress_values[] = {
67 [ME_GMES_PHASE_ROM] = "ROM Phase",
68 [ME_GMES_PHASE_BUP] = "BUP Phase",
69 [ME_GMES_PHASE_UKERNEL] = "uKernel Phase",
70 [ME_GMES_PHASE_POLICY] = "Policy Module",
71 [ME_GMES_PHASE_MODULE] = "Module Loading",
72 [ME_GMES_PHASE_UNKNOWN] = "Unknown",
73 [ME_GMES_PHASE_HOST] = "Host Communication"
76 /* GMES[27:24] Power Management Event */
77 static const char *me_pmevent_values[] = {
78 [0x00] = "Clean Moff->Mx wake",
79 [0x01] = "Moff->Mx wake after an error",
80 [0x02] = "Clean global reset",
81 [0x03] = "Global reset after an error",
82 [0x04] = "Clean Intel ME reset",
83 [0x05] = "Intel ME reset due to exception",
84 [0x06] = "Pseudo-global reset",
85 [0x07] = "S0/M0->Sx/M3",
86 [0x08] = "Sx/M3->S0/M0",
87 [0x09] = "Non-power cycle reset",
88 [0x0a] = "Power cycle reset through M3",
89 [0x0b] = "Power cycle reset through Moff",
90 [0x0c] = "Sx/Mx->Sx/Moff"
93 /* Progress Code 0 states */
94 static const char *me_progress_rom_values[] = {
99 /* Progress Code 1 states */
100 static const char *me_progress_bup_values[] = {
101 [0x00] = "Initialization starts",
102 [0x01] = "Disable the host wake event",
103 [0x04] = "Flow determination start process",
104 [0x08] = "Error reading/matching the VSCC table in the descriptor",
105 [0x0a] = "Check to see if straps say ME DISABLED",
106 [0x0b] = "Timeout waiting for PWROK",
107 [0x0d] = "Possibly handle BUP manufacturing override strap",
108 [0x11] = "Bringup in M3",
109 [0x12] = "Bringup in M0",
110 [0x13] = "Flow detection error",
111 [0x15] = "M3 clock switching error",
112 [0x18] = "M3 kernel load",
113 [0x1c] = "T34 missing - cannot program ICC",
114 [0x1f] = "Waiting for DID BIOS message",
115 [0x20] = "Waiting for DID BIOS message failure",
116 [0x21] = "DID reported an error",
117 [0x22] = "Enabling UMA",
118 [0x23] = "Enabling UMA error",
119 [0x24] = "Sending DID Ack to BIOS",
120 [0x25] = "Sending DID Ack to BIOS error",
121 [0x26] = "Switching clocks in M0",
122 [0x27] = "Switching clocks in M0 error",
123 [0x28] = "ME in temp disable",
124 [0x32] = "M0 kernel load",
127 /* Progress Code 3 states */
128 static const char *me_progress_policy_values[] = {
129 [0x00] = "Entery into Policy Module",
130 [0x03] = "Received S3 entry",
131 [0x04] = "Received S4 entry",
132 [0x05] = "Received S5 entry",
133 [0x06] = "Received UPD entry",
134 [0x07] = "Received PCR entry",
135 [0x08] = "Received NPCR entry",
136 [0x09] = "Received host wake",
137 [0x0a] = "Received AC<>DC switch",
138 [0x0b] = "Received DRAM Init Done",
139 [0x0c] = "VSCC Data not found for flash device",
140 [0x0d] = "VSCC Table is not valid",
141 [0x0e] = "Flash Partition Boundary is outside address space",
142 [0x0f] = "ME cannot access the chipset descriptor region",
143 [0x10] = "Required VSCC values for flash parts do not match",
147 void intel_me_status(struct me_hfs *hfs, struct me_gmes *gmes)
149 #if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
150 /* Check Current States */
151 printk(BIOS_DEBUG, "ME: FW Partition Table : %s\n",
152 hfs->fpt_bad ? "BAD" : "OK");
153 printk(BIOS_DEBUG, "ME: Bringup Loader Failure : %s\n",
154 hfs->ft_bup_ld_flr ? "YES" : "NO");
155 printk(BIOS_DEBUG, "ME: Firmware Init Complete : %s\n",
156 hfs->fw_init_complete ? "YES" : "NO");
157 printk(BIOS_DEBUG, "ME: Manufacturing Mode : %s\n",
158 hfs->mfg_mode ? "YES" : "NO");
159 printk(BIOS_DEBUG, "ME: Boot Options Present : %s\n",
160 hfs->boot_options_present ? "YES" : "NO");
161 printk(BIOS_DEBUG, "ME: Update In Progress : %s\n",
162 hfs->update_in_progress ? "YES" : "NO");
163 printk(BIOS_DEBUG, "ME: Current Working State : %s\n",
164 me_cws_values[hfs->working_state]);
165 printk(BIOS_DEBUG, "ME: Current Operation State : %s\n",
166 me_opstate_values[hfs->operation_state]);
167 printk(BIOS_DEBUG, "ME: Current Operation Mode : %s\n",
168 me_opmode_values[hfs->operation_mode]);
169 printk(BIOS_DEBUG, "ME: Error Code : %s\n",
170 me_error_values[hfs->error_code]);
171 printk(BIOS_DEBUG, "ME: Progress Phase : %s\n",
172 me_progress_values[gmes->progress_code]);
173 printk(BIOS_DEBUG, "ME: Power Management Event : %s\n",
174 me_pmevent_values[gmes->current_pmevent]);
176 printk(BIOS_DEBUG, "ME: Progress Phase State : ");
177 switch (gmes->progress_code) {
178 case ME_GMES_PHASE_ROM: /* ROM Phase */
179 printk(BIOS_DEBUG, "%s",
180 me_progress_rom_values[gmes->current_state]);
183 case ME_GMES_PHASE_BUP: /* Bringup Phase */
184 if (gmes->current_state < ARRAY_SIZE(me_progress_bup_values)
185 && me_progress_bup_values[gmes->current_state])
186 printk(BIOS_DEBUG, "%s",
187 me_progress_bup_values[gmes->current_state]);
189 printk(BIOS_DEBUG, "0x%02x", gmes->current_state);
192 case ME_GMES_PHASE_POLICY: /* Policy Module Phase */
193 if (gmes->current_state < ARRAY_SIZE(me_progress_policy_values)
194 && me_progress_policy_values[gmes->current_state])
195 printk(BIOS_DEBUG, "%s",
196 me_progress_policy_values[gmes->current_state]);
198 printk(BIOS_DEBUG, "0x%02x", gmes->current_state);
201 case ME_GMES_PHASE_HOST: /* Host Communication Phase */
202 if (!gmes->current_state)
203 printk(BIOS_DEBUG, "Host communication established");
205 printk(BIOS_DEBUG, "0x%02x", gmes->current_state);
209 printk(BIOS_DEBUG, "Unknown 0x%02x", gmes->current_state);
211 printk(BIOS_DEBUG, "\n");