2 * This file is part of the coreboot project.
4 * Copyright (C) 2008-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <arch/romcc_io.h>
23 #include <console/console.h>
24 #include <device/pci_ids.h>
25 #include <device/pci_def.h>
28 #define PCH_EHCI1_TEMP_BAR0 0xe8000000
29 #define PCH_EHCI2_TEMP_BAR0 0xe8000400
32 * Setup USB controller MMIO BAR to prevent the
33 * reference code from resetting the controller.
35 * The BAR will be re-assigned during device
36 * enumeration so these are only temporary.
38 void enable_usb_bar(void)
40 device_t usb0 = PCH_EHCI1_DEV;
41 device_t usb1 = PCH_EHCI2_DEV;
44 /* USB Controller 1 */
45 pci_write_config32(usb0, PCI_BASE_ADDRESS_0,
47 cmd = pci_read_config32(usb0, PCI_COMMAND);
48 cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
49 pci_write_config32(usb0, PCI_COMMAND, cmd);
51 /* USB Controller 1 */
52 pci_write_config32(usb1, PCI_BASE_ADDRESS_0,
54 cmd = pci_read_config32(usb1, PCI_COMMAND);
55 cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
56 pci_write_config32(usb1, PCI_COMMAND, cmd);