src/southbridge/broadcom/bcm5785/bcm5785_lpc.c

   1 /*
   2  * Copyright  2005 AMD
   3  *  by yinghai.lu@amd.com
   4  */
   5
   6 #include <console/console.h>
   7 #include <device/device.h>
   8 #include <device/pci.h>
   9 #include <device/pnp.h>
  10 #include <device/pci_ids.h>
  11 #include <device/pci_ops.h>
  12 #include <pc80/mc146818rtc.h>
  13 #include <pc80/isa-dma.h>
  14 #include <bitops.h>
  15 #include <arch/io.h>
  16 #include "bcm5785.h"
  17
  18 static void lpc_init(device_t dev)
  19 {
  20
  21         /* Initialize the real time clock */
  22         rtc_init(0);
  23
  24         /* Initialize isa dma */
  25         isa_dma_init();
  26
  27 }
  28
  29 static void bcm5785_lpc_read_resources(device_t dev)
  30 {
  31         struct resource *res;
  32
  33         /* Get the normal pci resources of this device */
  34         pci_dev_read_resources(dev);
  35
  36         /* Add an extra subtractive resource for both memory and I/O. */
  37         res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
  38         res->base = 0;
  39         res->size = 0x1000;
  40         res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
  41                      IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  42
  43         res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
  44         res->base = 0xff800000;
  45         res->size = 0x00800000; /* 8 MB for flash */
  46         res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
  47                      IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  48
  49         res = new_resource(dev, 3); /* IOAPIC */
  50         res->base = 0xfec00000;
  51         res->size = 0x00001000;
  52         res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  53 }
  54
  55 /**
  56  * @brief Enable resources for children devices
  57  *
  58  * @param dev the device whos children's resources are to be enabled
  59  *
  60  */
  61 static void bcm5785_lpc_enable_childrens_resources(device_t dev)
  62 {
  63         struct bus *link;
  64         uint32_t reg;
  65
  66         reg = pci_read_config8(dev, 0x44);
  67
  68         for (link = dev->link_list; link; link = link->next) {
  69                 device_t child;
  70                 for (child = link->children; child; child = child->sibling) {
  71                         if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
  72                                 struct resource *res;
  73                                 for(res = child->resource_list; res; res = res->next) {
  74                                         unsigned long base, end; // don't need long long
  75                                         if(!(res->flags & IORESOURCE_IO)) continue;
  76                                         base = res->base;
  77                                         end = resource_end(res);
  78                                         printk(BIOS_DEBUG, "bcm5785lpc decode:%s, base=0x%08lx, end=0x%08lx\n",dev_path(child),base, end);
  79                                         switch(base) {
  80                                         case 0x60: //KBC
  81                                         case 0x64:
  82                                                 reg |= (1<<29);
  83                                         case 0x3f8: // COM1
  84                                                 reg |= (1<<6);  break;
  85                                         case 0x2f8: // COM2
  86                                                 reg |= (1<<7);  break;
  87                                         case 0x378: // Parallal 1
  88                                                 reg |= (1<<0); break;
  89                                         case 0x3f0: // FD0
  90                                                 reg |= (1<<26); break;
  91                                         case 0x220:  // Aduio 0
  92                                                 reg |= (1<<14); break;
  93                                         case 0x300:  // Midi 0
  94                                                 reg |= (1<<18); break;
  95                                         }
  96                                 }
  97                         }
  98                 }
  99         }
 100         pci_write_config32(dev, 0x44, reg);
 101
 102
 103 }
 104
 105 static void bcm5785_lpc_enable_resources(device_t dev)
 106 {
 107         pci_dev_enable_resources(dev);
 108         bcm5785_lpc_enable_childrens_resources(dev);
 109 }
 110
 111 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 112 {
 113         pci_write_config32(dev, 0x40,
 114                 ((device & 0xffff) << 16) | (vendor & 0xffff));
 115 }
 116
 117 static struct pci_operations lops_pci = {
 118         .set_subsystem = lpci_set_subsystem,
 119 };
 120
 121 static struct device_operations lpc_ops  = {
 122         .read_resources   = bcm5785_lpc_read_resources,
 123         .set_resources    = pci_dev_set_resources,
 124         .enable_resources = bcm5785_lpc_enable_resources,
 125         .init             = lpc_init,
 126         .scan_bus         = scan_static_bus,
 127 //      .enable           = bcm5785_enable,
 128         .ops_pci          = &lops_pci,
 129 };
 130 static const struct pci_driver lpc_driver __pci_driver = {
 131         .ops    = &lpc_ops,
 132         .vendor = PCI_VENDOR_ID_SERVERWORKS,
 133         .device = PCI_DEVICE_ID_SERVERWORKS_BCM5785_LPC,
 134 };
 135