2 * This file is part of the coreboot project.
4 * Copyright (C) 2005 AMD
5 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <console/console.h>
22 #include <device/device.h>
23 #include <device/pci.h>
24 #include <device/pci_ids.h>
27 void bcm5785_enable(device_t dev)
29 device_t sb_pci_main_dev;
33 /* See if we are on the behind the pcix bridge */
34 bus_dev = dev->bus->dev;
35 if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
36 (bus_dev->device == 0x0036 )) // device under PCI-X Bridge
39 devfn = bus_dev->path.pci.devfn + (1 << 3);
40 sb_pci_main_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
41 // index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
42 } else if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
43 (bus_dev->device == 0x0104)) // device under PCI Bridge( under PCI-X )
46 devfn = bus_dev->bus->dev->path.pci.devfn + (1 << 3);
47 sb_pci_main_dev = dev_find_slot(bus_dev->bus->dev->bus->secondary, devfn);
48 // index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
52 devfn = (dev->path.pci.devfn) & ~7;
53 if( dev->vendor == PCI_VENDOR_ID_SERVERWORKS ) {
54 if(dev->device == 0x0036) //PCI-X Bridge
56 else if(dev->device == 0x0223) // USB
59 sb_pci_main_dev = dev_find_slot(dev->bus->secondary, devfn);
60 // index = dev->path.pci.devfn & 7;
62 if (!sb_pci_main_dev) {
68 unsigned reg_old, reg;
70 reg = reg_old = pci_read_config16(sb_pci_main_dev, 0x48);
76 pci_write_config16(sb_pci_main_dev, 0x48, reg);
79 else if (index == 16) {
80 reg = reg_old = pci_read_config8(sb_pci_main_dev, 0x47);
86 pci_write_config8(sb_pci_main_dev, 0x47, reg);
92 struct chip_operations southbridge_broadcom_bcm5785_ops = {
93 CHIP_NAME("Serverworks BCM5785 Southbridge")
94 .enable_dev = bcm5785_enable,