77777d2c011a0084d55b9d2b85fda88525326f02
[coreboot.git] / src / southbridge / broadcom / bcm5780 / bcm5780_pcie.c
1 /*
2  * Copyright  2005 AMD
3  *  by yinghai.lu@amd.com
4  */
5
6 #include <console/console.h>
7 #include <device/device.h>
8 #include <device/pci.h>
9 #include <device/pci_ids.h>
10 #include <device/pci_ops.h>
11
12 static void pcie_init(struct device *dev)
13 {
14
15         /* Enable pci error detecting */
16         uint32_t dword;
17
18         /* System error enable */
19         dword = pci_read_config32(dev, 0x04);
20         dword |= (1<<8); /* System error enable */
21         dword |= (1<<30); /* Clear possible errors */
22         pci_write_config32(dev, 0x04, dword);
23
24 }
25
26 static struct pci_operations lops_pci = {
27         .set_subsystem = 0,
28 };
29
30 static struct device_operations pcie_ops  = {
31         .read_resources   = pci_bus_read_resources,
32         .set_resources    = pci_dev_set_resources,
33         .enable_resources = pci_bus_enable_resources,
34         .init             = pcie_init,
35         .scan_bus         = pci_scan_bridge,
36         .reset_bus        = pci_bus_reset,
37         .ops_pci          = &lops_pci,
38
39 };
40
41 static const struct pci_driver pcie_driver __pci_driver = {
42         .ops    = &pcie_ops,
43         .vendor = PCI_VENDOR_ID_SERVERWORKS,
44         .device = PCI_DEVICE_ID_SERVERWORKS_BCM5780_PCIE,
45 };
46