2 * This file is part of the coreboot project.
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <device/device.h>
22 #include <device/pci.h>
23 #include <device/pci_ids.h>
24 #include <device/pci_ops.h>
29 static struct pci_operations lops_pci = {
30 .set_subsystem = pci_dev_set_subsystem,
33 static void usb_init(struct device *dev)
38 /* 6.1 Enable OHCI0-4 and EHCI Controllers */
40 sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
41 byte = pci_read_config8(sm_dev, 0x68);
43 pci_write_config8(sm_dev, 0x68, byte);
45 /* RPR 6.2 Enables the USB PME Event,Enable USB resume support */
46 byte = pm_ioread(0x61);
48 pm_iowrite(0x61, byte);
49 byte = pm_ioread(0x65);
51 pm_iowrite(0x65, byte);
53 /* RPR 6.3 Support USB device wakeup from the S4/S5 state */
54 byte = pm_ioread(0x65);
56 pm_iowrite(0x65, byte);
58 /* RPR 6.5 Enable the USB controller to get reset by any software that generate a PCIRst# condition */
59 byte = pm_ioread(0x65);
61 pm_iowrite(0x65, byte);
63 /* RPR 6.10 Disable OHCI MSI Capability. */
64 word = pci_read_config16(dev, 0x40);
66 pci_write_config16(dev, 0x40, word);
69 static void usb_init2(struct device *dev)
76 sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
77 rev = get_sb700_revision(sm_dev);
79 /* dword = pci_read_config32(dev, 0xf8); */
81 /* pci_write_config32(dev, 0xf8, dword); */
83 usb2_bar0 = pci_read_config32(dev, 0x10) & ~0xFF;
84 printk(BIOS_INFO, "usb2_bar0=0x%x\n", usb2_bar0);
86 /* RPR6.4 Enables the USB PHY auto calibration resister to match 45ohm resistance */
88 write32(usb2_bar0 + 0xC0, dword);
90 /* RPR6.9 Sets In/OUT FIFO threshold for best performance */
92 write32(usb2_bar0 + 0xA4, dword);
94 /* RPR6.11 Disabling EHCI Advance Asynchronous Enhancement */
95 dword = pci_read_config32(dev, 0x50);
97 pci_write_config32(dev, 0x50, dword);
99 /* RPR 6.12 EHCI Advance PHY Power Savings */
100 /* RPR says it is just for A12. CIMM sets it when it is above A11. */
101 /* But it makes the linux crash, so we skip it */
103 dword = pci_read_config32(dev, 0x50);
105 pci_write_config32(dev, 0x50, dword);
108 /* RPR6.13 Enabling Fix for EHCI Controller Driver Yellow Sign Issue */
109 /* RPR says it is just for A12. CIMx sets it when it is above A11. */
110 dword = pci_read_config32(dev, 0x50);
112 pci_write_config32(dev, 0x50, dword);
114 /* RPR6.15 EHCI Async Park Mode */
115 dword = pci_read_config32(dev, 0x50);
117 pci_write_config32(dev, 0x50, dword);
119 /* Each step below causes the linux crashes. Leave them here
120 * for future debugging. */
125 /* RPR6.16 Disable EHCI MSI support */
126 byte = pci_read_config8(dev, 0x50);
128 pci_write_config8(dev, 0x50, byte);
130 /* RPR6.17 Disable the EHCI Dynamic Power Saving feature */
131 word = read32(usb2_bar0 + 0xBC);
133 write16(usb2_bar0 + 0xBC, word);
135 /* RPR6.19 USB Controller DMA Read Delay Tolerant. */
136 if (rev >= REV_SB700_A14) {
137 byte = pci_read_config8(dev, 0x50);
139 pci_write_config8(dev, 0x50, byte);
142 /* RPR6.20 Async Park Mode. */
143 /* RPR recommends not to set these bits. */
145 dword = pci_read_config32(dev, 0x50);
147 if (rev >= REV_SB700_A14) {
150 pci_write_config32(dev, 0x50, dword);
153 /* RPR6.22 Advance Async Enhancement */
154 /* RPR6.23 USB Periodic Cache Setting */
155 dword = pci_read_config32(dev, 0x50);
156 if (rev == REV_SB700_A12) {
157 dword |= 1 << 28; /* 6.22 */
158 dword |= 1 << 27; /* 6.23 */
159 } else if (rev >= REV_SB700_A14) {
161 dword &= ~(1 << 28); /* 6.22 */
163 dword &= ~(1 << 27); /* 6.23 */
165 printk(BIOS_DEBUG, "rpr 6.23, final dword=%x\n", dword);
169 static void usb_set_resources(struct device *dev)
172 struct resource *res;
176 old_debug = get_ehci_debug();
179 pci_dev_set_resources(dev);
182 res = find_resource(dev, 0x10);
183 set_ehci_debug(old_debug);
188 report_resource_stored(dev, res, "");
192 static struct device_operations usb_ops = {
193 .read_resources = pci_dev_read_resources,
194 .set_resources = usb_set_resources, /* pci_dev_set_resources, */
195 .enable_resources = pci_dev_enable_resources,
198 .ops_pci = &lops_pci,
201 static const struct pci_driver usb_0_driver __pci_driver = {
203 .vendor = PCI_VENDOR_ID_ATI,
204 .device = PCI_DEVICE_ID_ATI_SB700_USB_18_0,
207 static const struct pci_driver usb_1_driver __pci_driver = {
209 .vendor = PCI_VENDOR_ID_ATI,
210 .device = PCI_DEVICE_ID_ATI_SB700_USB_18_1,
213 /* the pci id of usb ctrl 0 and 1 are the same. */
215 * static const struct pci_driver usb_3_driver __pci_driver = {
217 * .vendor = PCI_VENDOR_ID_ATI,
218 * .device = PCI_DEVICE_ID_ATI_SB700_USB_19_0,
220 * static const struct pci_driver usb_4_driver __pci_driver = {
222 * .vendor = PCI_VENDOR_ID_ATI,
223 * .device = PCI_DEVICE_ID_ATI_SB700_USB_19_1,
227 static const struct pci_driver usb_4_driver __pci_driver = {
229 .vendor = PCI_VENDOR_ID_ATI,
230 .device = PCI_DEVICE_ID_ATI_SB700_USB_20_5,
233 static struct device_operations usb_ops2 = {
234 .read_resources = pci_dev_read_resources,
235 .set_resources = usb_set_resources, /* pci_dev_set_resources, */
236 .enable_resources = pci_dev_enable_resources,
239 .ops_pci = &lops_pci,
242 static const struct pci_driver usb_5_driver __pci_driver = {
244 .vendor = PCI_VENDOR_ID_ATI,
245 .device = PCI_DEVICE_ID_ATI_SB700_USB_18_2,
248 * static const struct pci_driver usb_5_driver __pci_driver = {
250 * .vendor = PCI_VENDOR_ID_ATI,
251 * .device = PCI_DEVICE_ID_ATI_SB700_USB_19_2,