2 * This file is part of the coreboot project.
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <device/device.h>
22 #include <device/pci.h>
23 #include <device/pci_ids.h>
24 #include <device/pci_ops.h>
29 static struct pci_operations lops_pci = {
30 .set_subsystem = pci_dev_set_subsystem,
33 static void usb_init(struct device *dev)
38 /* 6.1 Enable OHCI0-4 and EHCI Controllers */
40 sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
41 byte = pci_read_config8(sm_dev, 0x68);
43 pci_write_config8(sm_dev, 0x68, byte);
46 /* RPR 6.2 Enables the USB PME Event,Enable USB resume support */
47 byte = pm_ioread(0x61);
49 pm_iowrite(0x61, byte);
50 byte = pm_ioread(0x65);
52 pm_iowrite(0x65, byte);
54 /* RPR 6.3 Support USB device wakeup from the S4/S5 state */
55 byte = pm_ioread(0x65);
57 pm_iowrite(0x65, byte);
59 /* RPR 6.5 Enable the USB controller to get reset by any software that generate a PCIRst# condition */
60 byte = pm_ioread(0x65);
62 pm_iowrite(0x65, byte);
64 /* RPR 6.10 Disable OHCI MSI Capability. */
65 word = pci_read_config16(dev, 0x40);
67 pci_write_config16(dev, 0x40, word);
70 static void usb_init2(struct device *dev)
77 sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
78 rev = get_sb700_revision(sm_dev);
80 /* dword = pci_read_config32(dev, 0xf8); */
82 /* pci_write_config32(dev, 0xf8, dword); */
84 usb2_bar0 = pci_read_config32(dev, 0x10) & ~0xFF;
85 printk(BIOS_INFO, "usb2_bar0=0x%x\n", usb2_bar0);
87 /* RPR6.4 Enables the USB PHY auto calibration resister to match 45ohm resistence */
89 write32(usb2_bar0 + 0xC0, dword);
91 /* RPR6.9 Sets In/OUT FIFO threshold for best performance */
93 write32(usb2_bar0 + 0xA4, dword);
95 /* RPR6.11 Disabling EHCI Advance Asynchronous Enhancement */
96 dword = pci_read_config32(dev, 0x50);
98 pci_write_config32(dev, 0x50, dword);
100 /* RPR 6.12 EHCI Advance PHY Power Savings */
101 /* RPR says it is just for A12. CIMM sets it when it is above A11. */
102 /* But it makes the linux crash, so we skip it */
104 dword = pci_read_config32(dev, 0x50);
106 pci_write_config32(dev, 0x50, dword);
109 /* RPR6.13 Enabling Fix for EHCI Controller Dirver Yellow Sign Issue */
110 /* RPR says it is just for A12. CIMM sets it when it is above A11. */
111 dword = pci_read_config32(dev, 0x50);
113 pci_write_config32(dev, 0x50, dword);
115 /* RPR6.15 EHCI Async Park Mode */
116 dword = pci_read_config32(dev, 0x50);
118 pci_write_config32(dev, 0x50, dword);
120 /* Each step below causes the linux crashes. Leave them here
121 * for future debugging. */
126 /* RPR6.16 Disable EHCI MSI support */
127 byte = pci_read_config8(dev, 0x50);
129 pci_write_config8(dev, 0x50, byte);
131 /* RPR6.17 Disable the EHCI Dynamic Power Saving feature */
132 word = read32(usb2_bar0 + 0xBC);
134 write16(usb2_bar0 + 0xBC, word);
136 /* RPR6.19 USB Controller DMA Read Delay Tolerant. */
137 if (rev >= REV_SB700_A14) {
138 byte = pci_read_config8(dev, 0x50);
140 pci_write_config8(dev, 0x50, byte);
143 /* RPR6.20 Async Park Mode. */
144 /* RPR recommends not to set these bits. */
146 dword = pci_read_config32(dev, 0x50);
148 if (rev >= REV_SB700_A14) {
151 pci_write_config32(dev, 0x50, dword);
154 /* RPR6.22 Advance Async Enhancement */
155 /* RPR6.23 USB Periodic Cache Setting */
156 dword = pci_read_config32(dev, 0x50);
157 if (rev == REV_SB700_A12) {
158 dword |= 1 << 28; /* 6.22 */
159 dword |= 1 << 27; /* 6.23 */
160 } else if (rev >= REV_SB700_A14) {
162 dword &= ~(1 << 28); /* 6.22 */
164 dword &= ~(1 << 27); /* 6.23 */
166 printk(BIOS_DEBUG, "rpr 6.23, final dword=%x\n", dword);
170 static void usb_set_resources(struct device *dev)
173 struct resource *res;
177 old_debug = get_ehci_debug();
180 pci_dev_set_resources(dev);
183 res = find_resource(dev, 0x10);
184 set_ehci_debug(old_debug);
189 report_resource_stored(dev, res, "");
194 static struct device_operations usb_ops = {
195 .read_resources = pci_dev_read_resources,
196 .set_resources = usb_set_resources, /* pci_dev_set_resources, */
197 .enable_resources = pci_dev_enable_resources,
200 .ops_pci = &lops_pci,
203 static const struct pci_driver usb_0_driver __pci_driver = {
205 .vendor = PCI_VENDOR_ID_ATI,
206 .device = PCI_DEVICE_ID_ATI_SB700_USB_18_0,
208 static const struct pci_driver usb_1_driver __pci_driver = {
210 .vendor = PCI_VENDOR_ID_ATI,
211 .device = PCI_DEVICE_ID_ATI_SB700_USB_18_1,
214 /* the pci id of usb ctrl 0 and 1 are the same. */
216 * static const struct pci_driver usb_3_driver __pci_driver = {
218 * .vendor = PCI_VENDOR_ID_ATI,
219 * .device = PCI_DEVICE_ID_ATI_SB700_USB_19_0,
221 * static const struct pci_driver usb_4_driver __pci_driver = {
223 * .vendor = PCI_VENDOR_ID_ATI,
224 * .device = PCI_DEVICE_ID_ATI_SB700_USB_19_1,
228 static const struct pci_driver usb_4_driver __pci_driver = {
230 .vendor = PCI_VENDOR_ID_ATI,
231 .device = PCI_DEVICE_ID_ATI_SB700_USB_20_5,
234 static struct device_operations usb_ops2 = {
235 .read_resources = pci_dev_read_resources,
236 .set_resources = usb_set_resources, /* pci_dev_set_resources, */
237 .enable_resources = pci_dev_enable_resources,
240 .ops_pci = &lops_pci,
243 static const struct pci_driver usb_5_driver __pci_driver = {
245 .vendor = PCI_VENDOR_ID_ATI,
246 .device = PCI_DEVICE_ID_ATI_SB700_USB_18_2,
249 * static const struct pci_driver usb_5_driver __pci_driver = {
251 * .vendor = PCI_VENDOR_ID_ATI,
252 * .device = PCI_DEVICE_ID_ATI_SB700_USB_19_2,