src/southbridge/amd/sb700/sb700_lpc.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2010 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 #include <console/console.h>
  21 #include <device/device.h>
  22 #include <device/pci.h>
  23 #include <device/pnp.h>
  24 #include <device/pci_ids.h>
  25 #include <device/pci_ops.h>
  26 #include <pc80/mc146818rtc.h>
  27 #include <pc80/isa-dma.h>
  28 #include <bitops.h>
  29 #include <arch/io.h>
  30 #include "sb700.h"
  31
  32 static void lpc_init(device_t dev)
  33 {
  34         u8 byte;
  35         u32 dword;
  36         device_t sm_dev;
  37
  38         /* Enable the LPC Controller */
  39         sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
  40         dword = pci_read_config32(sm_dev, 0x64);
  41         dword |= 1 << 20;
  42         pci_write_config32(sm_dev, 0x64, dword);
  43
  44         /* Initialize isa dma */
  45         isa_dma_init();
  46
  47         /* Enable DMA transaction on the LPC bus */
  48         byte = pci_read_config8(dev, 0x40);
  49         byte |= (1 << 2);
  50         pci_write_config8(dev, 0x40, byte);
  51
  52         /* Disable the timeout mechanism on LPC */
  53         byte = pci_read_config8(dev, 0x48);
  54         byte &= ~(1 << 7);
  55         pci_write_config8(dev, 0x48, byte);
  56
  57         /* Disable LPC MSI Capability */
  58         byte = pci_read_config8(dev, 0x78);
  59         byte &= ~(1 << 1);
  60         pci_write_config8(dev, 0x78, byte);
  61
  62 }
  63
  64 static void sb700_lpc_read_resources(device_t dev)
  65 {
  66         struct resource *res;
  67
  68         /* Get the normal pci resources of this device */
  69         pci_dev_read_resources(dev);    /* We got one for APIC, or one more for TRAP */
  70
  71         pci_get_resource(dev, 0xA0); /* SPI ROM base address */
  72
  73         /* Add an extra subtractive resource for both memory and I/O. */
  74         res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
  75         res->base = 0;
  76         res->size = 0x1000;
  77         res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
  78                      IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  79
  80         res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
  81         res->base = 0xff800000;
  82         res->size = 0x00800000; /* 8 MB for flash */
  83         res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
  84                      IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  85
  86         res = new_resource(dev, 3); /* IOAPIC */
  87         res->base = 0xfec00000;
  88         res->size = 0x00001000;
  89         res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  90
  91         compact_resources(dev);
  92 }
  93
  94 static void sb700_lpc_set_resources(struct device *dev)
  95 {
  96         struct resource *res;
  97         u8 byte;
  98
  99         pci_dev_set_resources(dev);
 100
 101         /* Specical case. SPI Base Address. The SpiRomEnable should be set. */
 102         res = find_resource(dev, 0xA0);
 103         pci_write_config32(dev, 0xA0, res->base | 1 << 1);
 104
 105 }
 106
 107 /**
 108  * @brief Enable resources for children devices
 109  *
 110  * @param dev the device whos children's resources are to be enabled
 111  *
 112  * This function is call by the global enable_resources() indirectly via the
 113  * device_operation::enable_resources() method of devices.
 114  *
 115  * Indirect mutual recursion:
 116  *      enable_childrens_resources() -> enable_resources()
 117  *      enable_resources() -> device_operation::enable_resources()
 118  *      device_operation::enable_resources() -> enable_children_resources()
 119  */
 120 static void sb700_lpc_enable_childrens_resources(device_t dev)
 121 {
 122         u32 link;
 123         u32 reg, reg_x;
 124         int i;
 125         int var_num = 0;
 126         u16 reg_var[3];
 127
 128         reg = pci_read_config32(dev, 0x44);
 129         reg_x = pci_read_config32(dev, 0x48);
 130
 131         for (link = 0; link < dev->links; link++) {
 132                 device_t child;
 133                 for (child = dev->link[link].children; child;
 134                      child = child->sibling) {
 135                         enable_resources(child);
 136                         if (child->enabled
 137                             && (child->path.type == DEVICE_PATH_PNP)) {
 138                                 for (i = 0; i < child->resources; i++) {
 139                                         struct resource *res;
 140                                         u32 base, end;  /*  don't need long long */
 141                                         res = &child->resource[i];
 142                                         if (!(res->flags & IORESOURCE_IO))
 143                                                 continue;
 144                                         base = res->base;
 145                                         end = resource_end(res);
 146                                         printk(BIOS_DEBUG, "sb700 lpc decode:%s, base=0x%08x, end=0x%08x\n",
 147                                              dev_path(child), base, end);
 148                                         switch (base) {
 149                                         case 0x60:      /*  KB */
 150                                         case 0x64:      /*  MS */
 151                                                 reg |= (1 << 29);
 152                                                 break;
 153                                         case 0x3f8:     /*  COM1 */
 154                                                 reg |= (1 << 6);
 155                                                 break;
 156                                         case 0x2f8:     /*  COM2 */
 157                                                 reg |= (1 << 7);
 158                                                 break;
 159                                         case 0x378:     /*  Parallal 1 */
 160                                                 reg |= (1 << 0);
 161                                                 break;
 162                                         case 0x3f0:     /*  FD0 */
 163                                                 reg |= (1 << 26);
 164                                                 break;
 165                                         case 0x220:     /*  Aduio 0 */
 166                                                 reg |= (1 << 8);
 167                                                 break;
 168                                         case 0x300:     /*  Midi 0 */
 169                                                 reg |= (1 << 18);
 170                                                 break;
 171                                         case 0x400:
 172                                                 reg_x |= (1 << 16);
 173                                                 break;
 174                                         case 0x480:
 175                                                 reg_x |= (1 << 17);
 176                                                 break;
 177                                         case 0x500:
 178                                                 reg_x |= (1 << 18);
 179                                                 break;
 180                                         case 0x580:
 181                                                 reg_x |= (1 << 19);
 182                                                 break;
 183                                         case 0x4700:
 184                                                 reg_x |= (1 << 22);
 185                                                 break;
 186                                         case 0xfd60:
 187                                                 reg_x |= (1 << 23);
 188                                                 break;
 189                                         default:
 190                                                 if (var_num >= 3)
 191                                                         continue;       /* only 3 var ; compact them ? */
 192                                                 switch (var_num) {
 193                                                 case 0:
 194                                                         reg_x |= (1 << 2);
 195                                                         break;
 196                                                 case 1:
 197                                                         reg_x |= (1 << 24);
 198                                                         break;
 199                                                 case 2:
 200                                                         reg_x |= (1 << 25);
 201                                                         break;
 202                                                 }
 203                                                 reg_var[var_num++] =
 204                                                     base & 0xffff;
 205                                         }
 206                                 }
 207                         }
 208                 }
 209         }
 210         pci_write_config32(dev, 0x44, reg);
 211         pci_write_config32(dev, 0x48, reg_x);
 212         /* Set WideIO for as many IOs found (fall through is on purpose) */
 213         switch (var_num) {
 214         case 2:
 215                 pci_write_config16(dev, 0x90, reg_var[2]);
 216         case 1:
 217                 pci_write_config16(dev, 0x66, reg_var[1]);
 218         case 0:
 219                 pci_write_config16(dev, 0x64, reg_var[0]);
 220                 break;
 221         }
 222 }
 223
 224 static void sb700_lpc_enable_resources(device_t dev)
 225 {
 226         pci_dev_enable_resources(dev);
 227         sb700_lpc_enable_childrens_resources(dev);
 228 }
 229
 230 static struct pci_operations lops_pci = {
 231         .set_subsystem = pci_dev_set_subsystem,
 232 };
 233
 234 static struct device_operations lpc_ops = {
 235         .read_resources = sb700_lpc_read_resources,
 236         .set_resources = sb700_lpc_set_resources,
 237         .enable_resources = sb700_lpc_enable_resources,
 238         .init = lpc_init,
 239         .scan_bus = scan_static_bus,
 240         .ops_pci = &lops_pci,
 241 };
 242 static const struct pci_driver lpc_driver __pci_driver = {
 243         .ops = &lpc_ops,
 244         .vendor = PCI_VENDOR_ID_ATI,
 245         .device = PCI_DEVICE_ID_ATI_SB700_LPC,
 246 };