2 * This file is part of the coreboot project.
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 * ACPI - create the Fixed ACPI Description Tables (FADT)
25 #include <console/console.h>
26 #include <arch/acpi.h>
28 #include <device/device.h>
31 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
33 acpi_header_t *header = &(fadt->header);
35 printk(BIOS_DEBUG, "pm_base: 0x%04x\n", SB700_ACPI_IO_BASE);
37 /* Prepare the header */
38 memset((void *)fadt, 0, sizeof(acpi_fadt_t));
39 memcpy(header->signature, "FACP", 4);
42 memcpy(header->oem_id, OEM_ID, 6);
43 memcpy(header->oem_table_id, "COREBOOT", 8);
44 memcpy(header->asl_compiler_id, ASLC, 4);
45 header->asl_compiler_revision = 0;
47 fadt->firmware_ctrl = (u32) facs;
48 fadt->dsdt = (u32) dsdt;
49 /* 3=Workstation,4=Enterprise Server, 7=Performance Server */
50 fadt->preferred_pm_profile = 0x03;
52 /* disable system management mode by setting to 0: */
54 fadt->acpi_enable = 0xf0;
55 fadt->acpi_disable = 0xf1;
56 fadt->s4bios_req = 0x0;
57 fadt->pstate_cnt = 0xe2;
59 pm_iowrite(0x20, ACPI_PM_EVT_BLK & 0xFF);
60 pm_iowrite(0x21, ACPI_PM_EVT_BLK >> 8);
61 pm_iowrite(0x22, ACPI_PM1_CNT_BLK & 0xFF);
62 pm_iowrite(0x23, ACPI_PM1_CNT_BLK >> 8);
63 pm_iowrite(0x24, ACPI_PM_TMR_BLK & 0xFF);
64 pm_iowrite(0x25, ACPI_PM_TMR_BLK >> 8);
65 pm_iowrite(0x28, ACPI_GPE0_BLK & 0xFF);
66 pm_iowrite(0x29, ACPI_GPE0_BLK >> 8);
68 /* CpuControl is in \_PR.CPU0, 6 bytes */
69 pm_iowrite(0x26, ACPI_CPU_CONTROL & 0xFF);
70 pm_iowrite(0x27, ACPI_CPU_CONTROL >> 8);
72 pm_iowrite(0x2A, 0); /* AcpiSmiCmdLo */
73 pm_iowrite(0x2B, 0); /* AcpiSmiCmdHi */
75 pm_iowrite(0x2C, ACPI_PMA_CNT_BLK & 0xFF);
76 pm_iowrite(0x2D, ACPI_PMA_CNT_BLK >> 8);
78 pm_iowrite(0x0E, 1<<3 | 0<<2); /* AcpiDecodeEnable, When set, SB uses
79 * the contents of the PM registers at
80 * index 20-2B to decode ACPI I/O address.
81 * AcpiSmiEn & SmiCmdEn*/
82 pm_iowrite(0x10, 1<<1 | 1<<3| 1<<5); /* RTC_En_En, TMR_En_En, GBL_EN_EN */
83 outl(0x1, ACPI_PM1_CNT_BLK); /* set SCI_EN */
85 fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
86 fadt->pm1b_evt_blk = 0x0000;
87 fadt->pm1a_cnt_blk = ACPI_PM1_CNT_BLK;
88 fadt->pm1b_cnt_blk = 0x0000;
89 fadt->pm2_cnt_blk = ACPI_PMA_CNT_BLK;
90 fadt->pm_tmr_blk = ACPI_PM_TMR_BLK;
91 fadt->gpe0_blk = ACPI_GPE0_BLK;
92 fadt->gpe1_blk = 0x0000; /* we dont have gpe1 block, do we? */
94 fadt->pm1_evt_len = 4;
95 fadt->pm1_cnt_len = 2;
96 fadt->pm2_cnt_len = 1;
98 fadt->gpe0_blk_len = 8;
99 fadt->gpe1_blk_len = 0;
102 fadt->cst_cnt = 0xe3;
103 fadt->p_lvl2_lat = 101;
104 fadt->p_lvl3_lat = 1001;
105 fadt->flush_size = 0;
106 fadt->flush_stride = 0;
107 fadt->duty_offset = 1;
108 fadt->duty_width = 3;
109 fadt->day_alrm = 0; /* 0x7d these have to be */
110 fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */
111 fadt->century = 0; /* 0x7f to make rtc alrm work */
112 fadt->iapc_boot_arch = 0x3; /* See table 5-11 */
113 fadt->flags = 0x0001c1a5;/* 0x25; */
117 fadt->reset_reg.space_id = 1;
118 fadt->reset_reg.bit_width = 8;
119 fadt->reset_reg.bit_offset = 0;
120 fadt->reset_reg.resv = 0;
121 fadt->reset_reg.addrl = 0xcf9;
122 fadt->reset_reg.addrh = 0x0;
124 fadt->reset_value = 6;
125 fadt->x_firmware_ctl_l = (u32) facs;
126 fadt->x_firmware_ctl_h = 0;
127 fadt->x_dsdt_l = (u32) dsdt;
130 fadt->x_pm1a_evt_blk.space_id = 1;
131 fadt->x_pm1a_evt_blk.bit_width = 32;
132 fadt->x_pm1a_evt_blk.bit_offset = 0;
133 fadt->x_pm1a_evt_blk.resv = 0;
134 fadt->x_pm1a_evt_blk.addrl = ACPI_PM_EVT_BLK;
135 fadt->x_pm1a_evt_blk.addrh = 0x0;
137 fadt->x_pm1b_evt_blk.space_id = 1;
138 fadt->x_pm1b_evt_blk.bit_width = 4;
139 fadt->x_pm1b_evt_blk.bit_offset = 0;
140 fadt->x_pm1b_evt_blk.resv = 0;
141 fadt->x_pm1b_evt_blk.addrl = 0x0;
142 fadt->x_pm1b_evt_blk.addrh = 0x0;
144 fadt->x_pm1a_cnt_blk.space_id = 1;
145 fadt->x_pm1a_cnt_blk.bit_width = 16;
146 fadt->x_pm1a_cnt_blk.bit_offset = 0;
147 fadt->x_pm1a_cnt_blk.resv = 0;
148 fadt->x_pm1a_cnt_blk.addrl = ACPI_PM1_CNT_BLK;
149 fadt->x_pm1a_cnt_blk.addrh = 0x0;
151 fadt->x_pm1b_cnt_blk.space_id = 1;
152 fadt->x_pm1b_cnt_blk.bit_width = 2;
153 fadt->x_pm1b_cnt_blk.bit_offset = 0;
154 fadt->x_pm1b_cnt_blk.resv = 0;
155 fadt->x_pm1b_cnt_blk.addrl = 0x0;
156 fadt->x_pm1b_cnt_blk.addrh = 0x0;
158 fadt->x_pm2_cnt_blk.space_id = 1;
159 fadt->x_pm2_cnt_blk.bit_width = 0;
160 fadt->x_pm2_cnt_blk.bit_offset = 0;
161 fadt->x_pm2_cnt_blk.resv = 0;
162 fadt->x_pm2_cnt_blk.addrl = ACPI_PMA_CNT_BLK;
163 fadt->x_pm2_cnt_blk.addrh = 0x0;
165 fadt->x_pm_tmr_blk.space_id = 1;
166 fadt->x_pm_tmr_blk.bit_width = 32;
167 fadt->x_pm_tmr_blk.bit_offset = 0;
168 fadt->x_pm_tmr_blk.resv = 0;
169 fadt->x_pm_tmr_blk.addrl = ACPI_PM_TMR_BLK;
170 fadt->x_pm_tmr_blk.addrh = 0x0;
172 fadt->x_gpe0_blk.space_id = 1;
173 fadt->x_gpe0_blk.bit_width = 32;
174 fadt->x_gpe0_blk.bit_offset = 0;
175 fadt->x_gpe0_blk.resv = 0;
176 fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK;
177 fadt->x_gpe0_blk.addrh = 0x0;
179 fadt->x_gpe1_blk.space_id = 1;
180 fadt->x_gpe1_blk.bit_width = 0;
181 fadt->x_gpe1_blk.bit_offset = 0;
182 fadt->x_gpe1_blk.resv = 0;
183 fadt->x_gpe1_blk.addrl = 0;
184 fadt->x_gpe1_blk.addrh = 0x0;
186 header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));