src/southbridge/amd/sb600/sb600_lpc.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 #include <console/console.h>
  21 #include <device/device.h>
  22 #include <device/pci.h>
  23 #include <device/pnp.h>
  24 #include <device/pci_ids.h>
  25 #include <device/pci_ops.h>
  26 #include <pc80/mc146818rtc.h>
  27 #include <pc80/isa-dma.h>
  28 #include <bitops.h>
  29 #include <arch/io.h>
  30 #include "sb600.h"
  31
  32 static void lpc_init(device_t dev)
  33 {
  34         u8 byte;
  35         u32 dword;
  36         device_t sm_dev;
  37
  38         /* Enable the LPC Controller */
  39         sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
  40         dword = pci_read_config32(sm_dev, 0x64);
  41         dword |= 1 << 20;
  42         pci_write_config32(sm_dev, 0x64, dword);
  43
  44         /* Initialize isa dma */
  45         isa_dma_init();
  46
  47         /* RPR 7.2 Enable DMA transaction on the LPC bus */
  48         byte = pci_read_config8(dev, 0x40);
  49         byte |= (1 << 2);
  50         pci_write_config8(dev, 0x40, byte);
  51
  52         /* RPR 7.3 Disable the timeout mechanism on LPC */
  53         byte = pci_read_config8(dev, 0x48);
  54         byte &= ~(1 << 7);
  55         pci_write_config8(dev, 0x48, byte);
  56
  57         /* RPR 7.5 Disable LPC MSI Capability */
  58         byte = pci_read_config8(dev, 0x78);
  59         byte &= ~(1 << 1);
  60         pci_write_config8(dev, 0x78, byte);
  61
  62 }
  63
  64 static void sb600_lpc_read_resources(device_t dev)
  65 {
  66         struct resource *res;
  67
  68         /* Get the normal pci resources of this device */
  69         pci_dev_read_resources(dev);    /* We got one for APIC, or one more for TRAP */
  70
  71         pci_get_resource(dev, 0xA0); /* SPI ROM base address */
  72
  73         /* Add an extra subtractive resource for both memory and I/O. */
  74         res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
  75         res->base = 0;
  76         res->size = 0x1000;
  77         res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
  78                      IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  79
  80         res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
  81         res->base = 0xff800000;
  82         res->size = 0x00800000; /* 8 MB for flash */
  83         res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
  84                      IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  85
  86         res = new_resource(dev, 3); /* IOAPIC */
  87         res->base = 0xfec00000;
  88         res->size = 0x00001000;
  89         res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  90
  91         compact_resources(dev);
  92 }
  93
  94 /**
  95  * @brief Enable resources for children devices
  96  *
  97  * @param dev the device whos children's resources are to be enabled
  98  *
  99  */
 100 static void sb600_lpc_enable_childrens_resources(device_t dev)
 101 {
 102         struct bus *link;
 103         u32 reg, reg_x;
 104         int var_num = 0;
 105         u16 reg_var[3];
 106
 107         reg = pci_read_config32(dev, 0x44);
 108         reg_x = pci_read_config32(dev, 0x48);
 109
 110         for (link = dev->link_list; link; link = link->next) {
 111                 device_t child;
 112                 for (child = link->children; child;
 113                      child = child->sibling) {
 114                         if (child->enabled
 115                             && (child->path.type == DEVICE_PATH_PNP)) {
 116                                 struct resource *res;
 117                                 for (res = child->resource_list; res; res = res->next) {
 118                                         u32 base, end;  /*  don't need long long */
 119                                         if (!(res->flags & IORESOURCE_IO))
 120                                                 continue;
 121                                         base = res->base;
 122                                         end = resource_end(res);
 123                                         printk(BIOS_DEBUG, "sb600 lpc decode:%s, base=0x%08x, end=0x%08x\n",
 124                                              dev_path(child), base, end);
 125                                         switch (base) {
 126                                         case 0x60:      /*  KB */
 127                                         case 0x64:      /*  MS */
 128                                                 reg |= (1 << 29);
 129                                                 break;
 130                                         case 0x3f8:     /*  COM1 */
 131                                                 reg |= (1 << 6);
 132                                                 break;
 133                                         case 0x2f8:     /*  COM2 */
 134                                                 reg |= (1 << 7);
 135                                                 break;
 136                                         case 0x378:     /*  Parallal 1 */
 137                                                 reg |= (1 << 0);
 138                                                 break;
 139                                         case 0x3f0:     /*  FD0 */
 140                                                 reg |= (1 << 26);
 141                                                 break;
 142                                         case 0x220:     /*  Aduio 0 */
 143                                                 reg |= (1 << 8);
 144                                                 break;
 145                                         case 0x300:     /*  Midi 0 */
 146                                                 reg |= (1 << 18);
 147                                                 break;
 148                                         case 0x400:
 149                                                 reg_x |= (1 << 16);
 150                                                 break;
 151                                         case 0x480:
 152                                                 reg_x |= (1 << 17);
 153                                                 break;
 154                                         case 0x500:
 155                                                 reg_x |= (1 << 18);
 156                                                 break;
 157                                         case 0x580:
 158                                                 reg_x |= (1 << 19);
 159                                                 break;
 160                                         case 0x4700:
 161                                                 reg_x |= (1 << 22);
 162                                                 break;
 163                                         case 0xfd60:
 164                                                 reg_x |= (1 << 23);
 165                                                 break;
 166                                         default:
 167                                                 if (var_num >= 3)
 168                                                         continue;       /* only 3 var ; compact them ? */
 169                                                 switch (var_num) {
 170                                                 case 0:
 171                                                         reg_x |= (1 << 2);
 172                                                         break;
 173                                                 case 1:
 174                                                         reg_x |= (1 << 24);
 175                                                         break;
 176                                                 case 2:
 177                                                         reg_x |= (1 << 25);
 178                                                         break;
 179                                                 }
 180                                                 reg_var[var_num++] =
 181                                                     base & 0xffff;
 182                                         }
 183                                 }
 184                         }
 185                 }
 186         }
 187         pci_write_config32(dev, 0x44, reg);
 188         pci_write_config32(dev, 0x48, reg_x);
 189         /* Set WideIO for as many IOs found (fall through is on purpose) */
 190         switch (var_num) {
 191         case 2:
 192                 pci_write_config16(dev, 0x90, reg_var[2]);
 193         case 1:
 194                 pci_write_config16(dev, 0x66, reg_var[1]);
 195         case 0:
 196                 pci_write_config16(dev, 0x64, reg_var[0]);
 197                 break;
 198         }
 199 }
 200
 201 static void sb600_lpc_enable_resources(device_t dev)
 202 {
 203         pci_dev_enable_resources(dev);
 204         sb600_lpc_enable_childrens_resources(dev);
 205 }
 206
 207 static struct pci_operations lops_pci = {
 208         .set_subsystem = pci_dev_set_subsystem,
 209 };
 210
 211 static struct device_operations lpc_ops = {
 212         .read_resources = sb600_lpc_read_resources,
 213         .set_resources = pci_dev_set_resources,
 214         .enable_resources = sb600_lpc_enable_resources,
 215         .init = lpc_init,
 216         .scan_bus = scan_static_bus,
 217         /* .enable           = sb600_enable, */
 218         .ops_pci = &lops_pci,
 219 };
 220 static const struct pci_driver lpc_driver __pci_driver = {
 221         .ops = &lpc_ops,
 222         .vendor = PCI_VENDOR_ID_ATI,
 223         .device = PCI_DEVICE_ID_ATI_SB600_LPC,
 224 };