2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 #include <device/pci.h>
26 #include <device/pci_ids.h>
27 #include <statictree.h>
31 static struct device * find_sm_dev(struct device * dev, u32 devfn)
33 struct device * sm_dev;
35 sm_dev = dev_find_slot(dev->bus->secondary, devfn);
39 if ((sm_dev->vendor != PCI_VENDOR_ID_ATI) ||
40 ((sm_dev->device != PCI_DEVICE_ID_ATI_SB600_SM))) {
42 id = pci_read_config32(sm_dev, PCI_VENDOR_ID);
44 (PCI_VENDOR_ID_ATI | (PCI_DEVICE_ID_ATI_SB600_SM << 16))))
53 void set_sm_enable_bits(struct device * sm_dev, u32 reg_pos, u32 mask, u32 val)
56 reg = reg_old = pci_read_config32(sm_dev, reg_pos);
60 pci_write_config32(sm_dev, reg_pos, reg);
64 static void pmio_write_index(unsigned long port_base, u8 reg, u8 value)
67 outb(value, port_base + 1);
70 static u8 pmio_read_index(unsigned long port_base, u8 reg)
73 return inb(port_base + 1);
76 void pm_iowrite(u8 reg, u8 value)
78 unsigned long port_base = 0xcd6;
79 pmio_write_index(port_base, reg, value);
84 unsigned long port_base = 0xcd6;
85 return pmio_read_index(port_base, reg);
88 void pm2_iowrite(u8 reg, u8 value)
90 unsigned long port_base = 0xcd0;
91 pmio_write_index(port_base, reg, value);
96 unsigned long port_base = 0xcd0;
97 return pmio_read_index(port_base, reg);
100 static void set_pmio_enable_bits(struct device * sm_dev, u32 reg_pos,
104 reg = reg_old = pm_ioread(reg_pos);
107 if (reg != reg_old) {
108 pm_iowrite(reg_pos, reg);
112 void sb600_enable(struct device * dev)
114 struct device * sm_dev = 0;
115 struct device * bus_dev = 0;
120 /* struct southbridge_ati_sb600_config *conf; */
121 /* conf = dev->chip_info; */
126 printk(BIOS_DEBUG, "sb600_enable()\n");
129 * 0:12.0 SATA bit 8 of sm_dev 0xac : 1 - enable, default + 32 * 3
130 * 0:13.1 USB-1 bit 2 of sm_dev 0x68
131 * 0:13.2 USB-2 bit 3 of sm_dev 0x68
132 * 0:13.3 USB-3 bit 4 of sm_dev 0x68
133 * 0:13.4 USB-4 bit 5 of sm_dev 0x68
134 * 0:13.5 USB2 bit 0 of sm_dev 0x68 : 1 - enable, default
137 * 0:14.2 HDA bit 3 of pm_io 0x59 : 1 - enable, default + 32 * 4
138 * 0:14.3 LPC bit 20 of sm_dev 0x64 : 0 - disable, default + 32 * 1
140 * 0:14.5 ACI bit 0 of pm_io 0x59 : 0 - enable, default
141 * 0:14.6 MCI bit 1 of pm_io 0x59 : 0 - enable, default
143 if (dev->device == 0x0000) {
144 vendorid = pci_read_config32(dev, PCI_VENDOR_ID);
145 deviceid = (vendorid >> 16) & 0xffff;
148 vendorid = dev->vendor;
149 deviceid = dev->device;
151 bus_dev = dev->bus->dev;
152 if ((bus_dev->vendor == PCI_VENDOR_ID_ATI) &&
153 (bus_dev->device == PCI_DEVICE_ID_ATI_SB600_PCI)) {
154 devfn = (bus_dev->path.pci.devfn) & ~7;
155 sm_dev = find_sm_dev(bus_dev, devfn);
159 /* something under 00:01.0 */
160 switch (dev->path.pci.devfn) {
168 i = (dev->path.pci.devfn) & ~7;
170 for (devfn = (0x14 << 3); devfn <= i; devfn += (1 << 3)) {
171 sm_dev = find_sm_dev(dev, devfn);
178 switch (dev->path.pci.devfn - (devfn - (0x14 << 3))) {
179 case (0x12 << 3) | 0:
181 set_sm_enable_bits(sm_dev, 0xac, 1 << index,
182 (dev->enabled ? 1 : 0) << index);
185 case (0x13 << 3) | 0:
186 case (0x13 << 3) | 1:
187 case (0x13 << 3) | 2:
188 case (0x13 << 3) | 3:
189 case (0x13 << 3) | 4:
190 case (0x13 << 3) | 5:
191 index = dev->path.pci.devfn & 7;
194 set_sm_enable_bits(sm_dev, 0x68, 1 << index,
195 (dev->enabled ? 1 : 0) << index);
198 case (0x14 << 3) | 0:
201 case (0x14 << 3) | 1:
204 case (0x14 << 3) | 2:
206 set_pmio_enable_bits(sm_dev, 0x59, 1 << index,
207 (dev->enabled ? 1 : 0) << index);
210 case (0x14 << 3) | 3:
212 set_sm_enable_bits(sm_dev, 0x64, 1 << index,
213 (dev->enabled ? 1 : 0) << index);
216 case (0x14 << 3) | 4:
219 case (0x14 << 3) | 5:
220 case (0x14 << 3) | 6:
221 index = dev->path.pci.devfn & 7;
223 set_pmio_enable_bits(sm_dev, 0x59, 1 << index,
224 (dev->enabled ? 0 : 1) << index);
228 printk(BIOS_DEBUG, "unknown dev: %s deviceid=%4x\n", dev_path(dev),
233 struct device_operations sb600 = {
234 .id = {.type = DEVICE_ID_PCI,
235 {.pci = {.vendor = PCI_VENDOR_ID_AMD,
237 .constructor = default_device_constructor,
239 .phase4_enable_disable = sb600_enable,
240 .phase4_read_resources = pci_dev_read_resources,
241 .phase4_set_resources = pci_dev_set_resources,
243 .ops_pci = &pci_dev_ops_pci,