1 /*****************************************************************************
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2 * AMD Generic Encapsulated Software Architecture */
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6 * Agesa structures and definitions
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8 * Contains AMD AGESA/CIMx core interface
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10 * @xrefitem bom "File Content Label" "Release Content"
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12 * @e sub-project: Include
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13 * @e \$Revision:$ @e \$Date:$
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16 *****************************************************************************
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18 * This file is part of the coreboot project.
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20 * Copyright (C) 2010 Advanced Micro Devices, Inc.
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22 * This program is free software; you can redistribute it and/or modify
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23 * it under the terms of the GNU General Public License as published by
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24 * the Free Software Foundation; version 2 of the License.
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26 * This program is distributed in the hope that it will be useful,
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27 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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28 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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29 * GNU General Public License for more details.
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31 * You should have received a copy of the GNU General Public License
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32 * along with this program; if not, write to the Free Software
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33 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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34 * ***************************************************************************
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41 // AGESA Types and Definitions
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47 #define LAST_ENTRY 0xFFFFFFFF
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52 #define IMAGE_SIGNATURE 'DMA$'
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54 typedef UINTN AGESA_STATUS;
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56 #define AGESA_SUCCESS ((AGESA_STATUS) 0x0)
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57 #define AGESA_ALERT ((AGESA_STATUS) 0x40000000)
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58 #define AGESA_WARNING ((AGESA_STATUS) 0x40000001)
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59 #define AGESA_UNSUPPORTED ((AGESA_STATUS) 0x80000003)
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60 #define AGESA_ERROR ((AGESA_STATUS) 0xC0000001)
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61 #define AGESA_CRITICAL ((AGESA_STATUS) 0xC0000002)
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62 #define AGESA_FATAL ((AGESA_STATUS) 0xC0000003)
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64 typedef AGESA_STATUS (*CALLOUT_ENTRY) (UINT32 Param1, UINTN Param2, VOID* ConfigPtr);
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65 typedef AGESA_STATUS (*IMAGE_ENTRY) (IN OUT VOID* ConfigPtr);
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66 typedef AGESA_STATUS (*MODULE_ENTRY) (IN OUT VOID* ConfigPtr);
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68 ///This allocation type is used by the AmdCreateStruct entry point
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70 PreMemHeap = 0, ///< Create heap in cache.
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71 PostMemDram, ///< Create heap in memory.
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72 ByHost ///< Create heap by Host.
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73 } ALLOCATION_METHOD;
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75 /// These width descriptors are used by the library function, and others, to specify the data size
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76 typedef enum ACCESS_WIDTH {
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77 AccessWidth8 = 1, ///< Access width is 8 bits.
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78 AccessWidth16, ///< Access width is 16 bits.
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79 AccessWidth32, ///< Access width is 32 bits.
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80 AccessWidth64, ///< Access width is 64 bits.
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82 AccessS3SaveWidth8 = 0x81, ///< Save 8 bits data.
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83 AccessS3SaveWidth16, ///< Save 16 bits data.
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84 AccessS3SaveWidth32, ///< Save 32 bits data.
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85 AccessS3SaveWidth64, ///< Save 64 bits data.
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90 /// The standard header for all AGESA services.
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91 typedef struct _AMD_CONFIG_PARAMS {
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92 IN UINT32 ImageBasePtr; ///< The AGESA Image base address.
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93 IN UINT32 Func; ///< The service desired, @sa dispatch.h.
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94 IN UINT32 AltImageBasePtr; ///< Alternate Image location
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95 IN UINT32 PcieBasePtr; ///< PCIe MMIO Base address, if configured.
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96 union { ///< Callback pointer
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97 IN UINT64 PlaceHolder; ///< Place holder
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98 IN CALLOUT_ENTRY CalloutPtr; ///< For Callout from AGESA
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100 IN OUT UINT32 Reserved[2]; ///< This space is reserved for future use.
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101 } AMD_CONFIG_PARAMS;
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104 /// AGESA Binary module header structure
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105 typedef struct _AMD_IMAGE_HEADER {
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106 IN UINT32 Signature; ///< Binary Signature
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107 IN CHAR8 CreatorID[8]; ///< 8 characters ID
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108 IN CHAR8 Version[12]; ///< 12 characters version
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109 IN UINT32 ModuleInfoOffset; ///< Offset of module
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110 IN UINT32 EntryPointAddress; ///< Entry address
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111 IN UINT32 ImageBase; ///< Image base
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112 IN UINT32 RelocTableOffset; ///< Relocate Table offset
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113 IN UINT32 ImageSize; ///< Size
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114 IN UINT16 Checksum; ///< Checksum
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115 IN UINT8 ImageType; ///< Type
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116 IN UINT8 V_Reserved; ///< Reserved
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117 } AMD_IMAGE_HEADER;
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119 /// AGESA Binary module header structure
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120 typedef struct _AMD_MODULE_HEADER {
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121 IN UINT32 ModuleHeaderSignature; ///< Module signature
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122 IN CHAR8 ModuleIdentifier[8]; ///< 8 characters ID
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123 IN CHAR8 ModuleVersion[12]; ///< 12 characters version
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124 IN MODULE_ENTRY ModuleDispatcherPtr; ///< A pointer point to dispatcher
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125 IN struct _AMD_MODULE_HEADER *NextBlockPtr; ///< Next module header link
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126 } AMD_MODULE_HEADER;
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128 #define FUNC_0 0 // bit-placed for PCI address creation
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137 // SBDFO - Segment Bus Device Function Offset
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138 // 31:28 Segment (4-bits)
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139 // 27:20 Bus (8-bits)
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140 // 19:15 Device (5-bits)
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141 // 14:12 Function (3-bits)
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142 // 11:00 Offset (12-bits)
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145 #define MAKE_SBDFO(Seg, Bus, Dev, Fun, Off) ((((UINT32) (Seg)) << 28) | (((UINT32) (Bus)) << 20) | \
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146 (((UINT32) (Dev)) << 15) | (((UINT32) (Fun)) << 12) | ((UINT32) (Off)))
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148 #define ILLEGAL_SBDFO 0xFFFFFFFF
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150 /// CPUID data received registers format
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151 typedef struct _SB_CPUID_DATA {
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152 IN OUT UINT32 EAX_Reg; ///< CPUID instruction result in EAX
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153 IN OUT UINT32 EBX_Reg; ///< CPUID instruction result in EBX
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154 IN OUT UINT32 ECX_Reg; ///< CPUID instruction result in ECX
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155 IN OUT UINT32 EDX_Reg; ///< CPUID instruction result in EDX
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158 #define WARM_RESET 1
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159 #define COLD_RESET 2 // Cold reset
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160 #define RESET_CPU 4 // Triggers a CPU reset
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162 /// HT frequency for external callbacks
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164 HT_FREQUENCY_200M = 0, ///< HT speed 200 for external callbacks
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165 HT_FREQUENCY_400M = 2, ///< HT speed 400 for external callbacks
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166 HT_FREQUENCY_600M = 4, ///< HT speed 600 for external callbacks
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167 HT_FREQUENCY_800M = 5, ///< HT speed 800 for external callbacks
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168 HT_FREQUENCY_1000M = 6, ///< HT speed 1000 for external callbacks
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169 HT_FREQUENCY_1200M = 7, ///< HT speed 1200 for external callbacks
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170 HT_FREQUENCY_1400M = 8, ///< HT speed 1400 for external callbacks
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171 HT_FREQUENCY_1600M = 9, ///< HT speed 1600 for external callbacks
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172 HT_FREQUENCY_1800M = 10, ///< HT speed 1800 for external callbacks
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173 HT_FREQUENCY_2000M = 11, ///< HT speed 2000 for external callbacks
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174 HT_FREQUENCY_2200M = 12, ///< HT speed 2200 for external callbacks
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175 HT_FREQUENCY_2400M = 13, ///< HT speed 2400 for external callbacks
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176 HT_FREQUENCY_2600M = 14, ///< HT speed 2600 for external callbacks
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177 HT_FREQUENCY_2800M = 17, ///< HT speed 2800 for external callbacks
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178 HT_FREQUENCY_3000M = 18, ///< HT speed 3000 for external callbacks
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179 HT_FREQUENCY_3200M = 19 ///< HT speed 3200 for external callbacks
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183 #define BIT0 0x0000000000000001ull
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186 #define BIT1 0x0000000000000002ull
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189 #define BIT2 0x0000000000000004ull
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192 #define BIT3 0x0000000000000008ull
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195 #define BIT4 0x0000000000000010ull
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198 #define BIT5 0x0000000000000020ull
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201 #define BIT6 0x0000000000000040ull
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204 #define BIT7 0x0000000000000080ull
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207 #define BIT8 0x0000000000000100ull
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210 #define BIT9 0x0000000000000200ull
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213 #define BIT10 0x0000000000000400ull
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216 #define BIT11 0x0000000000000800ull
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219 #define BIT12 0x0000000000001000ull
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222 #define BIT13 0x0000000000002000ull
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225 #define BIT14 0x0000000000004000ull
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228 #define BIT15 0x0000000000008000ull
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231 #define BIT16 0x0000000000010000ull
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234 #define BIT17 0x0000000000020000ull
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237 #define BIT18 0x0000000000040000ull
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240 #define BIT19 0x0000000000080000ull
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243 #define BIT20 0x0000000000100000ull
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246 #define BIT21 0x0000000000200000ull
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249 #define BIT22 0x0000000000400000ull
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252 #define BIT23 0x0000000000800000ull
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255 #define BIT24 0x0000000001000000ull
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258 #define BIT25 0x0000000002000000ull
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261 #define BIT26 0x0000000004000000ull
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264 #define BIT27 0x0000000008000000ull
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267 #define BIT28 0x0000000010000000ull
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270 #define BIT29 0x0000000020000000ull
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273 #define BIT30 0x0000000040000000ull
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276 #define BIT31 0x0000000080000000ull
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279 #define BIT32 0x0000000100000000ull
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282 #define BIT33 0x0000000200000000ull
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285 #define BIT34 0x0000000400000000ull
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288 #define BIT35 0x0000000800000000ull
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291 #define BIT36 0x0000001000000000ull
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294 #define BIT37 0x0000002000000000ull
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297 #define BIT38 0x0000004000000000ull
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300 #define BIT39 0x0000008000000000ull
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303 #define BIT40 0x0000010000000000ull
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306 #define BIT41 0x0000020000000000ull
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309 #define BIT42 0x0000040000000000ull
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312 #define BIT43 0x0000080000000000ull
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315 #define BIT44 0x0000100000000000ull
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318 #define BIT45 0x0000200000000000ull
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321 #define BIT46 0x0000400000000000ull
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324 #define BIT47 0x0000800000000000ull
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327 #define BIT48 0x0001000000000000ull
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330 #define BIT49 0x0002000000000000ull
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333 #define BIT50 0x0004000000000000ull
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336 #define BIT51 0x0008000000000000ull
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339 #define BIT52 0x0010000000000000ull
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342 #define BIT53 0x0020000000000000ull
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345 #define BIT54 0x0040000000000000ull
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348 #define BIT55 0x0080000000000000ull
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351 #define BIT56 0x0100000000000000ull
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354 #define BIT57 0x0200000000000000ull
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357 #define BIT58 0x0400000000000000ull
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360 #define BIT59 0x0800000000000000ull
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363 #define BIT60 0x1000000000000000ull
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366 #define BIT61 0x2000000000000000ull
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369 #define BIT62 0x4000000000000000ull
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372 #define BIT63 0x8000000000000000ull
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