src/southbridge/amd/cimx/sb900/lpc.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2011 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 #include <device/pci.h>
  21 #include "lpc.h"
  22 #include <console/console.h>    /* printk */
  23
  24
  25 void lpc_read_resources(device_t dev)
  26 {
  27         struct resource *res;
  28
  29         printk(BIOS_DEBUG, "SB900 - Lpc.c - lpc_read_resources - Start.\n");
  30         /* Get the normal pci resources of this device */
  31         pci_dev_read_resources(dev);    /* We got one for APIC, or one more for TRAP */
  32
  33         pci_get_resource(dev, SPIROM_BASE_ADDRESS); /* SPI ROM base address */
  34
  35         /* Add an extra subtractive resource for both memory and I/O. */
  36         res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
  37         res->base = 0;
  38         res->size = 0x1000;
  39         res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
  40                      IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  41
  42         res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
  43         res->base = 0xff800000;
  44         res->size = 0x00800000; /* 8 MB for flash */
  45         res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
  46                      IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  47
  48         res = new_resource(dev, 3); /* IOAPIC */
  49         res->base = 0xfec00000;
  50         res->size = 0x00001000;
  51         res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  52
  53         compact_resources(dev);
  54         printk(BIOS_DEBUG, "SB900 - Lpc.c - lpc_read_resources - End.\n");
  55 }
  56
  57 void lpc_set_resources(struct device *dev)
  58 {
  59         struct resource *res;
  60
  61         printk(BIOS_DEBUG, "SB900 - Lpc.c - lpc_set_resources - Start.\n");
  62         pci_dev_set_resources(dev);
  63
  64         /* Specical case. SPI Base Address. The SpiRomEnable should be set. */
  65         res = find_resource(dev, SPIROM_BASE_ADDRESS);
  66         pci_write_config32(dev, SPIROM_BASE_ADDRESS, res->base | 1 << 1);
  67         printk(BIOS_DEBUG, "SB900 - Lpc.c - lpc_set_resources - End.\n");
  68 }
  69
  70 /**
  71  * @brief Enable resources for children devices
  72  *
  73  * @param dev the device whos children's resources are to be enabled
  74  *
  75  */
  76 void lpc_enable_childrens_resources(device_t dev)
  77 {
  78         struct bus *link;
  79         u32 reg, reg_x;
  80         int var_num = 0;
  81         u16 reg_var[3];
  82
  83         printk(BIOS_DEBUG, "SB900 - Lpc.c - lpc_enable_childrens_resources - Start.\n");
  84         reg = pci_read_config32(dev, 0x44);
  85         reg_x = pci_read_config32(dev, 0x48);
  86
  87         for (link = dev->link_list; link; link = link->next) {
  88                 device_t child;
  89                 for (child = link->children; child;
  90                      child = child->sibling) {
  91                         if (child->enabled
  92                             && (child->path.type == DEVICE_PATH_PNP)) {
  93                                 struct resource *res;
  94                                 for (res = child->resource_list; res; res = res->next) {
  95                                         u32 base, end;  /*  don't need long long */
  96                                         if (!(res->flags & IORESOURCE_IO))
  97                                                 continue;
  98                                         base = res->base;
  99                                         end = resource_end(res);
 100 /*
 101                                         printk(BIOS_DEBUG, "sb900 lpc decode:%s, base=0x%08x, end=0x%08x\n",
 102                                              dev_path(child), base, end);
 103 */
 104                                         switch (base) {
 105                                         case 0x60:      /*  KB */
 106                                         case 0x64:      /*  MS */
 107                                                 reg |= (1 << 29);
 108                                                 break;
 109                                         case 0x3f8:     /*  COM1 */
 110                                                 reg |= (1 << 6);
 111                                                 break;
 112                                         case 0x2f8:     /*  COM2 */
 113                                                 reg |= (1 << 7);
 114                                                 break;
 115                                         case 0x378:     /*  Parallal 1 */
 116                                                 reg |= (1 << 0);
 117                                                 break;
 118                                         case 0x3f0:     /*  FD0 */
 119                                                 reg |= (1 << 26);
 120                                                 break;
 121                                         case 0x220:     /*  Aduio 0 */
 122                                                 reg |= (1 << 8);
 123                                                 break;
 124                                         case 0x300:     /*  Midi 0 */
 125                                                 reg |= (1 << 18);
 126                                                 break;
 127                                         case 0x400:
 128                                                 reg_x |= (1 << 16);
 129                                                 break;
 130                                         case 0x480:
 131                                                 reg_x |= (1 << 17);
 132                                                 break;
 133                                         case 0x500:
 134                                                 reg_x |= (1 << 18);
 135                                                 break;
 136                                         case 0x580:
 137                                                 reg_x |= (1 << 19);
 138                                                 break;
 139                                         case 0x4700:
 140                                                 reg_x |= (1 << 22);
 141                                                 break;
 142                                         case 0xfd60:
 143                                                 reg_x |= (1 << 23);
 144                                                 break;
 145                                         default:
 146                                                 if (var_num >= 3)
 147                                                         continue;       /* only 3 var ; compact them ? */
 148                                                 switch (var_num) {
 149                                                 case 0:
 150                                                         reg_x |= (1 << 2);
 151                                                         break;
 152                                                 case 1:
 153                                                         reg_x |= (1 << 24);
 154                                                         break;
 155                                                 case 2:
 156                                                         reg_x |= (1 << 25);
 157                                                         break;
 158                                                 }
 159                                                 reg_var[var_num++] =
 160                                                     base & 0xffff;
 161                                         }
 162                                 }
 163                         }
 164                 }
 165         }
 166         pci_write_config32(dev, 0x44, reg);
 167         pci_write_config32(dev, 0x48, reg_x);
 168         /* Set WideIO for as many IOs found (fall through is on purpose) */
 169         switch (var_num) {
 170         case 2:
 171                 pci_write_config16(dev, 0x90, reg_var[2]);
 172         case 1:
 173                 pci_write_config16(dev, 0x66, reg_var[1]);
 174         case 0:
 175                 //pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata
 176                 break;
 177         }
 178         printk(BIOS_DEBUG, "SB900 - Lpc.c - lpc_enable_childrens_resources - End.\n");
 179 }