2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <device/device.h> /* device_t */
22 #include <device/pci.h> /* device_operations */
23 #include <device/pci_ids.h>
24 #include <device/smbus.h> /* smbus_bus_operations */
25 #include <console/console.h> /* printk */
26 #include "lpc.h" /* lpc_read_resources */
27 #include "SbPlatform.h" /* Platfrom Specific Definitions */
28 #include "chip.h" /* struct southbridge_amd_cimx_sb900_config */
31 /*implement in mainboard.c*/
32 //void set_pcie_assert(void);
33 //void set_pcie_deassert(void);
34 void set_pcie_reset(void);
35 void set_pcie_dereset(void);
41 static AMDSBCFG sb_late_cfg; //global, init in sb900_cimx_config
42 static AMDSBCFG *sb_config = &sb_late_cfg;
46 * @brief Entry point of Southbridge CIMx callout
48 * prototype UINT32 (*SBCIM_HOOK_ENTRY)(UINT32 Param1, UINT32 Param2, void* pConfig)
50 * @param[in] func Southbridge CIMx Function ID.
51 * @param[in] data Southbridge Input Data.
52 * @param[in] sb_config Southbridge configuration structure pointer.
55 u32 sb900_callout_entry(u32 func, u32 data, void* config)
59 printk(BIOS_DEBUG, "SB900 - Late.c - sb900_callout_entry - Start.\n");
61 case CB_SBGPP_RESET_ASSERT:
66 case CB_SBGPP_RESET_DEASSERT:
67 //set_pcie_deassert();
68 //- set_pcie_dereset();
71 //- case IMC_FIRMWARE_FAIL:
78 printk(BIOS_DEBUG, "SB900 - Late.c - sb900_callout_entry - End.\n");
83 static struct pci_operations lops_pci = {
87 static void lpc_enable_resources(device_t dev)
90 printk(BIOS_DEBUG, "SB900 - Late.c - lpc_enable_resources - Start.\n");
91 pci_dev_enable_resources(dev);
92 //lpc_enable_childrens_resources(dev);
93 printk(BIOS_DEBUG, "SB900 - Late.c - lpc_enable_resources - End.\n");
96 static void lpc_init(device_t dev)
98 printk(BIOS_DEBUG, "SB900 - Late.c - lpc_init - Start.\n");
99 /* SB Configure HPET base and enable bit */
100 //- hpetInit(sb_config, &(sb_config->BuildParameters));
101 printk(BIOS_DEBUG, "SB900 - Late.c - lpc_init - End.\n");
104 static struct device_operations lpc_ops = {
105 .read_resources = lpc_read_resources,
106 .set_resources = lpc_set_resources,
107 .enable_resources = lpc_enable_resources,
109 .scan_bus = scan_static_bus,
110 .ops_pci = &lops_pci,
113 static const struct pci_driver lpc_driver __pci_driver = {
115 .vendor = PCI_VENDOR_ID_AMD,
116 .device = PCI_DEVICE_ID_ATI_SB900_LPC,
120 static void sata_enable_resources(struct device *dev)
122 printk(BIOS_DEBUG, "SB900 - Late.c - sata_enable_resources - Start.\n");
123 //- sataInitAfterPciEnum(sb_config);
124 pci_dev_enable_resources(dev);
125 printk(BIOS_DEBUG, "SB900 - Late.c - sata_enable_resources - End.\n");
128 static void sata_init(struct device *dev)
130 printk(BIOS_DEBUG, "SB900 - Late.c - sata_init - Start.\n");
131 sb_config->StdHeader.Func = SB_MID_POST_INIT;
132 //- AmdSbDispatcher(sb_config); //sataInitMidPost only
133 //- commonInitLateBoot(sb_config);
134 //- sataInitLatePost(sb_config);
135 printk(BIOS_DEBUG, "SB900 - Late.c - sata_init - End.\n");
138 static struct device_operations sata_ops = {
139 .read_resources = pci_dev_read_resources,
140 .set_resources = pci_dev_set_resources,
141 .enable_resources = sata_enable_resources, //pci_dev_enable_resources,
144 .ops_pci = &lops_pci,
147 static const struct pci_driver sata_driver __pci_driver = {
149 .vendor = PCI_VENDOR_ID_AMD,
150 #if (CONFIG_SATA_CONTROLLER_MODE == 0x0 || CONFIG_SATA_CONTROLLER_MODE == 0x3)
151 .device = PCI_DEVICE_ID_ATI_SB900_SATA, //SATA IDE Mode
153 #if (CONFIG_SATA_CONTROLLER_MODE == 0x2 || CONFIG_SATA_CONTROLLER_MODE == 0x4)
154 .device = PCI_DEVICE_ID_ATI_SB900_SATA_AHCI, //SATA AHCI Mode
156 #if (CONFIG_SATA_CONTROLLER_MODE == 0x5 || CONFIG_SATA_CONTROLLER_MODE == 0x6)
157 .device = PCI_DEVICE_ID_ATI_SB900_SATA_AMDAHCI, //SATA AMDAHCI Mode
159 #if (CONFIG_SATA_CONTROLLER_MODE == 0x1 && INCHIP_SATA_FORCE_RAID5 == 0x0)
160 .device = PCI_DEVICE_ID_ATI_SB900_SATA_RAID5, //SATA RAID5 Mode
162 #if (CONFIG_SATA_CONTROLLER_MODE == 0x1 && INCHIP_SATA_FORCE_RAID5 == 0x1)
163 .device = PCI_DEVICE_ID_ATI_SB900_SATA_RAID, //SATA RAID Mode
169 static void usb_set_resources(struct device *dev)
171 struct resource *res;
175 printk(BIOS_DEBUG, "SB900 - Late.c - usb_set_resources - Start.\n");
176 old_debug = get_ehci_debug();
179 pci_dev_set_resources(dev);
181 res = find_resource(dev, 0x10);
182 set_ehci_debug(old_debug);
187 report_resource_stored(dev, res, "");
188 printk(BIOS_DEBUG, "SB900 - Late.c - usb_set_resources - End.\n");
192 static void usb_init(struct device *dev)
194 printk(BIOS_DEBUG, "SB900 - Late.c - usb_init - Start.\n");
195 //- usbInitAfterPciInit(sb_config);
196 //- commonInitLateBoot(sb_config);
197 printk(BIOS_DEBUG, "SB900 - Late.c - usb_init - End.\n");
200 static struct device_operations usb_ops = {
201 .read_resources = pci_dev_read_resources,
203 .set_resources = usb_set_resources,
205 .set_resources = pci_dev_set_resources,
207 .enable_resources = pci_dev_enable_resources,
210 .ops_pci = &lops_pci,
214 * The pci id of usb ctrl 0 and 1 are the same.
216 static const struct pci_driver usb_xhci123_driver __pci_driver = {
218 .vendor = PCI_VENDOR_ID_AMD,
219 .device = PCI_DEVICE_ID_ATI_SB900_USB_16_0, /* XHCI-USB1, XHCI-USB2 */
222 static const struct pci_driver usb_ohci123_driver __pci_driver = {
224 .vendor = PCI_VENDOR_ID_AMD,
225 .device = PCI_DEVICE_ID_ATI_SB900_USB_18_0, /* OHCI-USB1, OHCI-USB2, OHCI-USB3 */
228 static const struct pci_driver usb_ehci123_driver __pci_driver = {
230 .vendor = PCI_VENDOR_ID_AMD,
231 .device = PCI_DEVICE_ID_ATI_SB900_USB_18_2, /* EHCI-USB1, EHCI-USB2, EHCI-USB3 */
234 static const struct pci_driver usb_ohci4_driver __pci_driver = {
236 .vendor = PCI_VENDOR_ID_AMD,
237 .device = PCI_DEVICE_ID_ATI_SB900_USB_20_5, /* OHCI-USB4 */
241 static void azalia_init(struct device *dev)
243 printk(BIOS_DEBUG, "SB900 - Late.c - azalia_init - Start.\n");
244 //- azaliaInitAfterPciEnum(sb_config); //Detect and configure High Definition Audio
245 printk(BIOS_DEBUG, "SB900 - Late.c - azalia_init - End.\n");
248 static struct device_operations azalia_ops = {
249 .read_resources = pci_dev_read_resources,
250 .set_resources = pci_dev_set_resources,
251 .enable_resources = pci_dev_enable_resources,
254 .ops_pci = &lops_pci,
257 static const struct pci_driver azalia_driver __pci_driver = {
259 .vendor = PCI_VENDOR_ID_AMD,
260 .device = PCI_DEVICE_ID_ATI_SB900_HDA,
264 static void gec_init(struct device *dev)
266 printk(BIOS_DEBUG, "SB900 - Late.c - gec_init - Start.\n");
267 //- gecInitAfterPciEnum(sb_config);
268 //- gecInitLatePost(sb_config);
269 printk(BIOS_DEBUG, "SB900 - Late.c - gec_init - End.\n");
272 static struct device_operations gec_ops = {
273 .read_resources = pci_dev_read_resources,
274 .set_resources = pci_dev_set_resources,
275 .enable_resources = pci_dev_enable_resources,
278 .ops_pci = &lops_pci,
281 static const struct pci_driver gec_driver __pci_driver = {
283 .vendor = PCI_VENDOR_ID_AMD,
284 .device = PCI_DEVICE_ID_ATI_SB900_GEC,
288 static void pcie_init(device_t dev)
290 printk(BIOS_DEBUG, "SB900 - Late.c - pcie_init - Start.\n");
291 //- sbPcieGppLateInit(sb_config);
292 printk(BIOS_DEBUG, "SB900 - Late.c - pcie_init - End.\n");
295 static struct device_operations pci_ops = {
296 .read_resources = pci_bus_read_resources,
297 .set_resources = pci_dev_set_resources,
298 .enable_resources = pci_bus_enable_resources,
300 .scan_bus = pci_scan_bridge,
301 .reset_bus = pci_bus_reset,
302 .ops_pci = &lops_pci,
305 static const struct pci_driver pci_driver __pci_driver = {
307 .vendor = PCI_VENDOR_ID_AMD,
308 .device = PCI_DEVICE_ID_ATI_SB900_PCI,
312 struct device_operations bridge_ops = {
313 .read_resources = pci_bus_read_resources,
314 .set_resources = pci_dev_set_resources,
315 .enable_resources = pci_bus_enable_resources,
317 .scan_bus = pci_scan_bridge,
319 .reset_bus = pci_bus_reset,
320 .ops_pci = &lops_pci,
323 /* 0:15:0 PCIe PortA */
324 static const struct pci_driver PORTA_driver __pci_driver = {
326 .vendor = PCI_VENDOR_ID_AMD,
327 .device = PCI_DEVICE_ID_ATI_SB900_PCIEA,
330 /* 0:15:1 PCIe PortB */
331 static const struct pci_driver PORTB_driver __pci_driver = {
333 .vendor = PCI_VENDOR_ID_AMD,
334 .device = PCI_DEVICE_ID_ATI_SB900_PCIEB,
337 /* 0:15:2 PCIe PortC */
338 static const struct pci_driver PORTC_driver __pci_driver = {
340 .vendor = PCI_VENDOR_ID_AMD,
341 .device = PCI_DEVICE_ID_ATI_SB900_PCIEC,
344 /* 0:15:3 PCIe PortD */
345 static const struct pci_driver PORTD_driver __pci_driver = {
347 .vendor = PCI_VENDOR_ID_AMD,
348 .device = PCI_DEVICE_ID_ATI_SB900_PCIED,
353 * @brief SB Cimx entry point sbBeforePciInit wrapper
355 static void sb900_enable(device_t dev)
358 struct southbridge_amd_cimx_sb900_config *sb_chip =
359 (struct southbridge_amd_cimx_sb900_config *)(dev->chip_info);
361 sb900_cimx_config(sb_config);
362 printk(BIOS_DEBUG, "sb900_enable() ");
364 /* Config SouthBridge SMBUS/ACPI/IDE/LPC/PCIB.*/
365 //- commonInitEarlyBoot(sb_config);
366 //- commonInitEarlyPost(sb_config);
368 switch (dev->path.pci.devfn) {
369 case (0x10 << 3) | 0: /* 0:10:0 XHCI-USB */
370 //- usbInitBeforePciEnum(sb_config); // USB POST TIME Only
373 case (0x11 << 3) | 0: /* 0:11.0 SATA */
375 sb_config->SATAMODE.SataMode.SataController = ENABLED;
376 if (1 == sb_chip->boot_switch_sata_ide)
377 sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 0; //0 -IDE as primary.
378 else if (0 == sb_chip->boot_switch_sata_ide)
379 sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 1; //1 -IDE as secondary.
381 sb_config->SATAMODE.SataMode.SataController = DISABLED;
384 //- sataInitBeforePciEnum(sb_config); // Init SATA class code and PHY
387 case (0x12 << 3) | 0: /* 0:12:0 OHCI-USB1 */
388 case (0x12 << 3) | 2: /* 0:12:2 EHCI-USB1 */
389 case (0x13 << 3) | 0: /* 0:13:0 OHCI-USB2 */
390 case (0x13 << 3) | 2: /* 0:13:2 EHCI-USB2 */
391 case (0x14 << 3) | 5: /* 0:14:5 OHCI-USB4 */
392 //- usbInitBeforePciEnum(sb_config); // USB POST TIME Only
395 case (0x14 << 3) | 0: /* 0:14:0 SMBUS */
398 case (0x14 << 3) | 1: /* 0:14:1 IDE */
400 sb_config->SATAMODE.SataMode.SataIdeCombinedMode = ENABLED;
402 sb_config->SATAMODE.SataMode.SataIdeCombinedMode = DISABLED;
404 //- sataInitBeforePciEnum(sb_config); // Init SATA class code and PHY
407 case (0x14 << 3) | 2: /* 0:14:2 HDA */
409 if (AZALIA_DISABLE == sb_config->AzaliaController) {
410 sb_config->AzaliaController = AZALIA_AUTO;
412 printk(BIOS_DEBUG, "hda enabled\n");
414 sb_config->AzaliaController = AZALIA_DISABLE;
415 printk(BIOS_DEBUG, "hda disabled\n");
417 //- azaliaInitBeforePciEnum(sb_config); // Detect and configure High Definition Audio
421 case (0x14 << 3) | 3: /* 0:14:3 LPC */
424 case (0x14 << 3) | 4: /* 0:14:4 PCI */
427 case (0x14 << 3) | 6: /* 0:14:6 GEC */
429 sb_config->GecConfig = 0;
430 printk(BIOS_DEBUG, "gec enabled\n");
432 sb_config->GecConfig = 1;
433 printk(BIOS_DEBUG, "gec disabled\n");
435 //- gecInitBeforePciEnum(sb_config); // Init GEC
438 case (0x15 << 3) | 0: /* 0:15:0 PCIe PortA */
439 case (0x15 << 3) | 1: /* 0:15:1 PCIe PortB */
440 case (0x15 << 3) | 2: /* 0:15:2 PCIe PortC */
441 case (0x15 << 3) | 3: /* 0:15:3 PCIe PortD */
442 gpp_port = (dev->path.pci.devfn) & 0x03;
444 sb_config->PORTCONFIG[gpp_port].PortCfg.PortPresent = ENABLED;
446 sb_config->PORTCONFIG[gpp_port].PortCfg.PortPresent = DISABLED;
450 * GPP_CFGMODE_X4000: PortA Lanes[3:0]
451 * GPP_CFGMODE_X2200: PortA Lanes[1:0], PortB Lanes[3:2]
452 * GPP_CFGMODE_X2110: PortA Lanes[1:0], PortB Lane2, PortC Lane3
453 * GPP_CFGMODE_X1111: PortA Lanes0, PortB Lane1, PortC Lane2, PortD Lane3
455 if (sb_config->GppLinkConfig != sb_chip->gpp_configuration) {
456 sb_config->GppLinkConfig = sb_chip->gpp_configuration;
459 //- sbPcieGppEarlyInit(sb_config);
466 /* Special setting ABCFG registers before PCI emulation. */
467 //- abSpecialSetBeforePciEnum(sb_config);
468 //- usbDesertPll(sb_config);
469 //sb_config->StdHeader.Func = SB_BEFORE_PCI_INIT;
470 //AmdSbDispatcher(sb_config);
473 struct chip_operations southbridge_amd_cimx_sb900_ops = {
474 CHIP_NAME("ATI SB900")
475 .enable_dev = sb900_enable,