2 *****************************************************************************
4 * This file is part of the coreboot project.
6 * Copyright (C) 2011 Advanced Micro Devices, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * ***************************************************************************
24 #ifndef _AMD_SBPLATFORM_H_
25 #define _AMD_SBPLATFORM_H_
27 //#include "cbtypes.h"
33 typedef unsigned long long PLACEHOLDER;
35 #ifndef SBOEM_ACPI_RESTORE_SWSMI
36 #define SBOEM_BEFORE_PCI_RESTORE_SWSMI 0xD3
37 #define SBOEM_AFTER_PCI_RESTORE_SWSMI 0xD4
40 #ifndef _AMD_NB_CIM_X_PROTOCOL_H_
43 /// Extended PCI Address
44 typedef struct _EXT_PCI_ADDR {
45 UINT32 Reg :16; ///< / PCI Register
46 UINT32 Func:3; ///< / PCI Function
47 UINT32 Dev :5; ///< / PCI Device
48 UINT32 Bus :8; ///< / PCI Address
52 typedef union _PCI_ADDR {
53 UINT32 ADDR; ///< / 32 bit Address
54 EXT_PCI_ADDR Addr; ///< / Extended PCI Address
58 #define FIXUP_PTR(ptr) ptr
60 #include <console/console.h>
63 #include <southbridge/amd/cimx/sb900/Amd.h>
70 #include "platform_cfg.h" /* mainboard specific configuration */
71 #include "Oem.h" /* platform default configuration */
73 #include "SbBiosRamUsage.h"
76 //------------------------------------------------------------------------------------------------------------------------//
78 * SB_CIMx_PARAMETER 0 1 2 Defult Value When CIMx Take over
79 * SpreadSpectrum CIMx take over User (Setup Option) User (Setup Option) Enable
80 * SpreadSpectrumType CIMx take over User (Setup Option) User (Setup Option) Normal
81 * HpetTimer CIMx take over User (Setup Option) User (Setup Option) Enable
82 * HpetMsiDis CIMx take over User (Setup Option) User (Setup Option) Enable (0x00)
83 * IrConfig CIMx take over User (Setup Option) User (Setup Option) Disable (0x00)
84 * SpiFastReadEnable CIMx take over User (Setup Option) User (Setup Option) Disable
85 * SpiFastReadSpeed CIMx take over User (Setup Option) User (Setup Option) Disable (NULL)
86 * NbSbGen2 CIMx take over User (Setup Option) User (Setup Option) Enable
87 * AlinkPhyPllPowerDown CIMx take over User (Setup Option) User (Setup Option) Enable
88 * ResetCpuOnSyncFlood CIMx take over User (Setup Option) User (Setup Option) Enable
89 * GppGen2 CIMx take over User (Setup Option) User (Setup Option) Disable
90 * GppMemWrImprove CIMx take over User (Setup Option) User (Setup Option) Enable
91 * GppPortAspm CIMx take over User (Setup Option) User (Setup Option) Disable
92 * GppLaneReversal CIMx take over User (Setup Option) User (Setup Option) Disable
93 * GppPhyPllPowerDown CIMx take over User (Setup Option) User (Setup Option) Enable
94 * UsbPhyPowerDown CIMx take over User (Setup Option) User (Setup Option) Disable
95 * SBGecDebugBus CIMx take over User (Setup Option) User (Setup Option) Disable
96 * SBGecPwr CIMx take over User (Setup Option) User (Setup Option) Nerver Power down (0x11)
97 * SataSetMaxGen2 CIMx take over User (Setup Option) User (Setup Option) Max Gen3 (0x00)
98 * SataClkMode CIMx take over User (Setup Option) User (Setup Option) 0x90 int. 100Mhz
99 * SataAggrLinkPmCap CIMx take over User (Setup Option) User (Setup Option) Enable
100 * SataPortMultCap CIMx take over User (Setup Option) User (Setup Option) Enable
101 * SataPscCap CIMx take over User (Setup Option) User (Setup Option) Enable (0x00)
102 * SataSscCap CIMx take over User (Setup Option) User (Setup Option) Enable (0x00)
103 * SataFisBasedSwitching CIMx take over User (Setup Option) User (Setup Option) Disable
104 * SataCccSupport CIMx take over User (Setup Option) User (Setup Option) Disable
105 * SataMsiCapability CIMx take over User (Setup Option) User (Setup Option) Enable
106 * SataClkAutoOff CIMx take over User (Setup Option) User (Setup Option) Disable
107 * AcDcMsg CIMx take over User (Setup Option) User (Setup Option) Disable
108 * TimerTickTrack CIMx take over User (Setup Option) User (Setup Option) Disable
109 * ClockInterruptTag CIMx take over User (Setup Option) User (Setup Option) Disable
110 * OhciTrafficHanding CIMx take over User (Setup Option) User (Setup Option) Disable
111 * EhciTrafficHanding CIMx take over User (Setup Option) User (Setup Option) Disable
112 * FusionMsgCMultiCore CIMx take over User (Setup Option) User (Setup Option) Disable
113 * FusionMsgCStage CIMx take over User (Setup Option) User (Setup Option) Disable
115 #define SB_CIMx_PARAMETER 0x02
118 #define cimSpreadSpectrumDefault TRUE
119 #define cimSpreadSpectrumTypeDefault 0x00 // Normal
120 #define cimHpetTimerDefault TRUE
121 #define cimHpetMsiDisDefault FALSE // Enable
122 #define cimIrConfigDefault 0x00 // Disable
123 #define cimSpiFastReadEnableDefault 0x00 // Disable
124 #define cimSpiFastReadSpeedDefault 0x00 // NULL
126 #define cimNbSbGen2Default TRUE
127 #define cimAlinkPhyPllPowerDownDefault TRUE
128 #define cimResetCpuOnSyncFloodDefault TRUE
129 #define cimGppGen2Default FALSE
130 #define cimGppMemWrImproveDefault TRUE
131 #define cimGppPortAspmDefault FALSE
132 #define cimGppLaneReversalDefault FALSE
133 #define cimGppPhyPllPowerDownDefault TRUE
135 #define cimUsbPhyPowerDownDefault FALSE
137 #define cimSBGecDebugBusDefault FALSE
138 #define cimSBGecPwrDefault 0x03
140 #define cimSataSetMaxGen2Default 0x00
141 #define cimSATARefClkSelDefault 0x10
142 #define cimSATARefDivSelDefault 0x80
143 #define cimSataAggrLinkPmCapDefault TRUE
144 #define cimSataPortMultCapDefault TRUE
145 #define cimSataPscCapDefault 0x00 // Enable
146 #define cimSataSscCapDefault 0x00 // Enable
147 #define cimSataFisBasedSwitchingDefault FALSE
148 #define cimSataCccSupportDefault FALSE
149 #define cimSataClkAutoOffDefault FALSE
150 #define cimNativepciesupportDefault FALSE
152 #define cimAcDcMsgDefault FALSE
153 #define cimTimerTickTrackDefault FALSE
154 #define cimClockInterruptTagDefault FALSE
155 #define cimOhciTrafficHandingDefault FALSE
156 #define cimEhciTrafficHandingDefault FALSE
157 #define cimFusionMsgCMultiCoreDefault FALSE
158 #define cimFusionMsgCStageDefault FALSE
159 #endif // _AMD_SBPLATFORM_H_